MRS Meetings and Events

 

EL18.09.63 2023 MRS Spring Meeting

Cu2O Thin-Film Transistor for CMOS Logic Circuit Through the Chemical Reaction During Annealing in N2 Atmosphere

When and Where

Apr 12, 2023
5:00pm - 7:00pm

Moscone West, Level 1, Exhibit Hall

Presenter

Co-Author(s)

Jae Hak Lee1,Youn Sang Kim1

Seoul National University1

Abstract

Jae Hak Lee1,Youn Sang Kim1

Seoul National University1
Metal oxide semiconductors have been emerging as a semiconductor material for next-generation electronic devices such as switching devices in displays, thin film diodes, solar cells, and Dynamic Random-Access Memory (DRAM) due to several advantages such as low cost, various deposition methods, low processing temperature, and processability on large-area glass substrate. However, it is difficult to construct a low power logic circuit based on Complementary Metal-Oxide-Semiconductor (CMOS) with only n-type metal oxide TFTs, so p-type metal oxide TFTs with good electrical performance is required. Cuprous oxide (Cu<sub>2</sub>O) is a potentially promising p-type semiconductor due to the intrinsically good electrical properties such as high hole mobility over 100 cm<sup>2</sup>/Vs and the possibility to fabricate devices using conventional semiconductor processes. Despite an intrinsic high hole mobility, Cu<sub>2</sub>O TFT has still shown poor electrical performances. Several studies proposed dissociative Cu defects and CuO impurities as the cause of the poor electrical properties of Cu<sub>2</sub>O TFTs. First, dissociative Cu (interstitial Cu) defects create a donor-like sub-gap states in the band gap of p-type Cu<sub>2</sub>O, causing high off-current. Second, the other considering point is CuO impurities in the Cu<sub>2</sub>O thin film, which induce sub-gap states that serve as a hole trapping site above the VBM of Cu<sub>2</sub>O because the bandgap of CuO (1.4 eV) is smaller than that of Cu<sub>2</sub>O (2.17 eV). Thus, dissociative Cu (interstitial Cu) defects and CuO impurities play a critically detrimental role in the quality of Cu<sub>2</sub>O thin film. Dissociative Cu defects cause high off-current and CuO impurities cause low field effect mobility. Therefore, it is essential to reduce dissociative Cu and CuO impurities in order to improve the electrical performance of Cu<sub>2</sub>O TFTs.<br/>Here, we demonstrated Cu<sub>2</sub>O TFTs with high field effect mobility and low off-current through reduction of CuO impurities and dissociative Cu defects by simply controlling the fabrication conditions without inducing any additional layers or chemical treatments. In the Radio Frequency (RF) sputtering deposition process, a Cu<sub>x</sub>O thin film with a high CuO ratio was fabricated by using a mixed gas of Ar and O<sub>2</sub> as working gas. Then, post annealing was performed while flowing N<sub>2</sub> gas. Oxygen added to the working gas during deposition increases the CuO ratio in the copper oxide thin film and consequently reduces dissociative Cu defects. Also, the N<sub>2</sub> atmosphere in annealing plays an important role in reducing Cu<sub>x</sub>O to Cu<sub>2</sub>O and prevents oxidation to CuO phase. During post annealing, when CuO - CuO transformed to Cu<sub>2</sub>O, oxygen is generated, and the generated oxygen oxidized dissociative Cu defects to CuO. The formed CuO also combined with another CuO and transited to Cu<sub>2</sub>O. These chemical reactions occur repeatedly and continuously during the annealing process, creating a chain reaction. By XRD and XPS analysis, we confirmed that the fabrication method of Cu<sub>2</sub>O thin film combined with controlled deposition and anneal effectively reduces CuO impurities and dissociative Cu defects, the ratio of dissociative Cu defects decreased from 11.3% to 3.1%, which are responsible for the degradation of the electrical properties of Cu<sub>2</sub>O TFTs. The fabricated Cu<sub>2</sub>O TFTs were showed the field effect mobility of 1.19 ± 0.06 cm<sup>2</sup>/Vs, the on/off current ratio of 1.09 ± 0.06 × 10<sup>5</sup>. And the Cu<sub>2</sub>O TFT device exhibited a Vth shift of 3.31 V under negative bias stress (Vds = -10V, Vgs = -20V, 4000s). As a practical application, we demonstrated CMOS inverter with n-type IGZO TFT and p-type Cu<sub>2</sub>O TFT and this device achieved a gain of 14 at V<sub>DD</sub> = 20 V. Our new fabrication route showed that it was possible to simply fabricate a high-quality Cu<sub>2</sub>O thin film, effectively improve the electrical properties of Cu<sub>2</sub>O TFTs, and make low-power CMOS logic circuits based on metal oxide semiconductors.

Keywords

annealing | thin film

Symposium Organizers

Ho-Hsiu Chou, National Tsing Hua University
Francisco Molina-Lopez, KU Leuven
Sihong Wang, University of Chicago
Xuzhou Yan, Shanghai Jiao Tong University

Symposium Support

Bronze
Azalea Vision
MilliporeSigma
Device, Cell Press

Session Chairs

Ho-Hsiu Chou
Francisco Molina-Lopez
Sihong Wang

In this Session

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EL18.09.03
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Direct Printing of Suspended Metal Oxides Nanowires on MEMS Chip as Gas Sensor

EL18.09.05
A Pen-on-Paper Graphene Oxide-Based Nanocomposite for Multitype Strain Sensing

EL18.09.06
Printed Memristors for Memory, Computing and Hardware Security

EL18.09.07
Formation of NiSi by Pulsed Laser Annealing on Contact Resistance Reduction and its Applications on Flexible Inverter and 6T-SRAM

EL18.09.08
Thiol-ene Chemistry in the Dielectric Layer Manipulating Polymer-based Devices from Transistors to Non-volatile Memory Devices

EL18.09.09
Photocurable Stretchable Silver Nanocomposite Electrodes

EL18.09.10
Morphological Investigation of High Performance Bulk Heterojunction Active Layer to Probe the Origin of Device Instability

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