Pre-State-Dependent Ternary/Binary Logic Operation Obtained by Ink-jet Printed SWCNT/InO Heterojunction Transistors

The conventional von Neumann architecture, in which memory and processor are separated, has limitations in processing speed, energy consumption, and integrated circuits for next-generation electronic products. To solve the bottleneck of the von Neumann architecture, it is desirable to develop a new logic driving operation technique that simultaneously satisfies logic and memory control operation. Here, we present a pre-state-dependent ternary/binary logic inverter using a single-walled carbon nanotube (SWCNT)/ indium oxide (InO) heterojunction anti-ambipolar field-effect transistor (FET), which is reliably formed by an ink-jet printing method. The suggested device has a logic-in-memory characteristic that allows it to operate in ternary or binary mode change depending on the previous state. To be specific, when the previous state is V_DD = 3 V, the output value at the intermediate input follows the same V_DD = 3 V, and when the previous state is G_ND = 0 V, the output value at the intermediate input is half V_DD = 1.5 V. The maximum DC gain peak of 11.42 V/V in the forward V_Gsweep and 19.14 V/V in the reverse V_Gsweep, respectively, demonstrated the functions of ternary and binary inverter operation. In the pulsed-measurement, this study also demonstrates the transient operation of the pre-state-dependent ternary/binary logic inverter circuit. Due to the hysteresis in the current-voltage curve of the InO FET used as the n-type FET and the negative transconductance (NTC) region of the anti-ambipolar FET, showing the binary behavior in the reverse bias while the ternary behavior in the forward bias. The device was manufactured by the ink-jet print method, which has multifarious advantages such as low cost, easy manufacturing process, ambient condition manufacturing, and large-area manufacturing.