Optimizing the Contact Structure for Scaled 50 nm-Channel MoS₂ and IGZO Field Effect Transistors

A novel idea of replacing conventional flat-edge electrodes with an array of spike-shaped electrodes has been implemented and proved useful for overcoming short-channel effects and improving charge injection. 50 nm-channel MoS₂ field effect transistors (FETs) with nanospike array electrodes demonstrated improved gate control relative to flat edge electrode devices. By using the nanospike array electrodes with 5 nanospikes and a 1:3 spike-to-spacing ratio, a high on/off ratio (~10⁷), negligible drain-induced barrier lowering (0.1 V/V), and a steep subthreshold swing can be achieved. While this design has worked well for amorphous metal oxide and organic semiconducting materials, the physics behind the nanospike electrodes is material dependent. Therefore, the structure of the nanospike needs to be optimized to realize the full potential for 2D materials such as MoS₂. We also hypothesize that the optimized nanospike electrodes work well for CVD grown MoS₂, which is more suitable for industrial-scale fabrication.<br/>The nanospike array electrodes were patterned onto 90 nm of SiO₂ using electron beam lithography and 17 nm of Cr and Au were thermally evaporated. 3 nm and 20 nm of MoS₂ and hBN flakes were mechanically exfoliated respectively and transferred onto the patterned contacts. The top gate with a width of 3 mm was patterned with 100 nm thick Cr and Au. The tips of the nanospike are 200 nm wide equilateral triangles with a 1mm long rectangular base protruding vertically between the conventional flat electrodes. The channel length between the tips of the source/drain nanospikes is 50 nm.<br/>Ideally, charge nanoribbons are formed at high drain biases between the spikes of the source and drain, resulting in the higher charge injection in a narrower semiconducting channel for each pair of the nanospikes. However, the spacing between each nanospike on the source/drain electrodes can have different effect on the formation of charge nanoribbons. We have examined various ratios of the nanospike vs. spacing including 1:2, 1:4, and 1:5 and compared with the established 1:3 ratio. As expected, the current magnitude is at its highest for 1:5 ratio (~ 70 mA vs. 20 mA for V_d = 1 V) due to larger channel width, but the subthreshold swing degradation was observed as well. Another configuration of the nanospike array electrodes that has worked well for organic materials is the one-sided nanospike electrodes. In this configuration, instead of using the nanospike electrodes for both the source and drain, the nanospikes are implemented on the source side only. The highest current magnitude (~160 mA), on/off ratio (~10⁹), and the steepest subthreshold swing (~100 mV/dec) were achieved in this configuration with a 1:3 spike-to-spacing ratio. Since the source electrode plays the main role of charge injection, having the nanospikes on the source side facilitates charge injection, while more charges are received by the drain side compared to the double-sided nanospike configuration, resulting in a higher drain current. A optimized structure for the nanospike array electrodes can be carefully selected by pairing the single-sided nanospike electrodes with the best spike-to-spacing ratio. The two-dimensional charge nanoribbons formed by this structure provides an alternative to the three-dimensional nanowire semiconducting channels that are currently being investigated by industry.<br/>Nanospike electrodes are also useful in flexible and printed electronics in which the contact metallization can be defined with nanoimprint lithography resulting in small channel lengths. Results with IGZO indicate that excellent transistor performance can be achieved with nanospike electrode devices even when the channel length is less than the gate insulator thickness, which is common in flexible and printed electronics.