Status and Progress of Vertical GaN-on-Silicon Devices

Lateral GaN-on-silicon power transistors are now qualified up to 650 V voltage operation. On the other hand, the development of cost-effective GaN-based vertical devices grown on large diameter silicon substrate combines the advantages of potentially higher voltage operation with avalanche mechanism, high current, high threshold voltage together with a smaller footprint, unreachable with lateral transistors. In addition, vertical architectures rely on current conduction through a drift layer with a uniformly distributed electric field that should prevent the issue of surface charge trapping effects. Nevertheless, this technology is still at an early stage and both material and device fabrication need to be optimized. In this talk, I will discuss the status and rapid progress of fully vertical GaN-on-Silicon devices. In particular, material and processing optimization results in state-of-the-art combination of breakdown voltage (BV) and on-state resistance (Ron) with the first demonstration of avalanche capability.