Characterization and Modelling of Thin Dielectric Layers for Advanced PV Cells

Thin dielectric layers are widely introduced as passivation, tunneling or carrier-transport layers in advanced photovoltaic (PV) cells, implemented in Si as well as more recently other thin-film semiconductor materials.<br/><br/>Specific characterization techniques and physical models need to be considered to identify and assess their electrical properties of importance for the performance of the PV cells.<br/><br/>The main concepts and their significance will be reviewed based on study cases incorporating different reference or innovative materials.<br/><br/>1) The electrical passivation performance (i.e. fixed oxide charges, interface traps and carrier lifetimes) of different Al₂O₃/SiO₂ thin dielectric stacks realized on monocrystalline Si substrates have been extracted from ac measurements of capacitance (C) and conductance (G) over wide ranges of frequencies and temperatures, with an analytical model comprising a 6-element equivalent circuit [1, 2]. The dc leakage current (I) at low voltage was furthermore related to the trap-assisted tunneling. The effective carrier lifetimes were measured by the contactless photoconductance decay method [3]. Lifetimes of almost 1 ms were obtained at low excess carrier density for the dielectric stack featuring the lowest values of oxide charges, interface states and trap-assisted tunneling current. Bias temperature instability was lately investigated on MOS capacitors, before and after annealing, towards optimizing the process conditions for long-term reliability [4].<br/><br/>2) Such extensive electrical characterization methodology, supported by modelling via numerical simulations (SCAPS, Silvaco Atlas), has been extended to Al₂O₃, HfO₂ and SiO_x layers implemented as a rear passivation layer for ultra-thin (UT) CIGS PV cells [5-7]. Extraction of intrinsic cell parameters from the dark current and ac measurements can be correlated with the PV performance under light [8]. Subsequently, the measured parameters have been introduced in a 2D model of rear-passivated UT-CIGS cells in ATLAS. The model has been exploited to understand and optimize the trade-off between passivation quality and series resistance (related to the ratio of passivated area versus the sizes of the rear opening contacts) that impacts gains or losses of cell performances, confirming experimental trends [9].<br/><br/>3) A third category of materials include TiO₂ or SnO₂ metal oxides that we have studied as electron-transport layers on Si, CIGS or perovskite substrates [10-11]. For such doped oxides, the C-V characteristics often show large variations and unexpected behaviors. Based on simulations that fairly reproduce our main observations and provide new physical insight, the results have been related to full or partial depletion effects, depending on the oxide doping level and thickness.<br/><br/>References : [1] Yan Y. et al, <i>Microelectronic Engineering</i> (2022); [2] Yan Y. et al, <i>Solid-State Electronics </i>(2022); [3] Yan Y. et al, <i>Proc. of the IEEE Latin America Electron Devices Conference (LAEDC,</i> 2021); [4] Yan Y. et al, <i>submitted</i> (2022); [5] Kotipalli R. et al, <i>AIP Advances</i> (2015); [6] Cunha J. et al, <i>Solar RRL</i> (2021); [7] Scaffidi R. et al, <i>Physica Status Solidi A</i> (2021); [8] Lontchi J. et al, <i>E-MRS Spring Meeting</i> <i>Symp. A</i> (2020, canceled), replaced by <i>Virtual Chalcogenide PV Conference</i> 2020; [9] Lontchi J. et al, <i>IEEE Journal of Photovoltaics</i> (2020); [10] Lontchi J. et al, <i>Applied Physics Express</i> (2021); [11] Cunha J. et al, <i>Advanced Materials Interfaces</i> (2021)