Yong-Young Noh1
Pohang University of Science and Technology1
Yong-Young Noh1
Pohang University of Science and Technology1
Developing high-mobility p-type semiconductors that can be grown using cost-effective scalable methods at low temperatures, has remained challenging in the electronics community for the integration of complementary electronics with the well-developed n-type metal oxide counterparts. Tin (Sn<sup>2+</sup>) halide perovskites emerge as promising p-type candidates but suffer from low crystallisation controllability and high film defect density, which result in uncompetitive device performance. In this talk, I would like to introduce a general overview and recent progress of our group of p-type Sn-based metal halide perovskites for the application of field-effect transistors (FETs). In the first part of the talk, I will mainly address inorganic perovskite thin-film transistors with exceptional performance using high-crystallinity and uniform cesium-tin-triiodide-based semiconducting layers with moderate hole concentrations and superior Hall mobilities, which are enabled by the judicious engineering of film composition and crystallization. The optimized devices exhibit high field-effect hole mobilities of over 50 cm<sup>2</sup> V<sup>−1</sup> s<sup>−1</sup>, large current modulation greater than 108, and high operational stability and reproducibility [1]. In the second part of the talk, I will introduce A-site cation engineering method to achieve high-performance pure-Sn perovskite thin-film transistors (TFTs). We explore triple A-cations of caesium-formamidinium-phenethylammonium to create high-quality cascaded Sn perovskite channel films, especially with low-defect phase-pure perovskite/dielectric interface. As such, the optimized TFTs show record hole mobilities of over 70 cm<sup>2</sup> V<sup>−1</sup> s<sup>−1</sup> and on/off current ratios of over 10<sup>8</sup>, comparable to the commercial low-temperature polysilicon technique level. The p-channel perovskite TFTs also show high processability and compatibility with the n-type metal oxides, enabling the integration of high-gain complementary inverters and rail-to-rail logic gates.<br/>References:<br/>[1] Ao Liu, Yong-Young Noh et al, Nature Electronics 5(2), 78-83 (2022)