MRS Meetings and Events

 

EQ01.14.04 2022 MRS Spring Meeting

Comprehensive Design and Simulation of E-Mode β-Ga2O3 Current-Aperture Vertical Electron Transistors

When and Where

May 23, 2022
2:00pm - 2:15pm

EQ01-Virtual

Presenter

Co-Author(s)

Dawei Wang1,Dinusha Herath Mudiyanselage1,Houqiang Fu1

Iowa State University1

Abstract

Dawei Wang1,Dinusha Herath Mudiyanselage1,Houqiang Fu1

Iowa State University1
Due to its ultra-wide bandgap, high critical electric field, and large Baliga's figure of merit (BFOM), beta-phase gallium oxide (β-Ga<sub>2</sub>O<sub>3</sub>) has attracted significant research attention for high-power, high-voltage, and high-frequency applications. Compared with lateral devices such as high electron mobility transistors (HEMTs), vertical devices have tremendous advantages in power electronics, including higher voltage and current handling capability, immunity to surface-related issues, simpler cooling requirement, smaller chip area, and easiness in scalability. Recently, β-Ga<sub>2</sub>O<sub>3</sub> based current aperture vertical electron transistors (CAVETs) have been demonstrated. However, the device performance is still far from the β-Ga<sub>2</sub>O<sub>3</sub> material limit, and several major challenges need to be addressed and, such as low breakdown voltage, high off-state leakage, small gate voltage swing, and difficulty in realizing enhancement mode (E-mode).<br/>In this work, we perform the first comprehensive design and modeling of β-Ga<sub>2</sub>O<sub>3</sub> CAVETs and explore their performance limit using TCAD SILVACO simulation. The simulated CAVETs structure consisted of an n<sup>+</sup>-Ga<sub>2</sub>O<sub>3</sub> substrate, an 8 um Ga<sub>2</sub>O<sub>3</sub> drift layer, a 0.8 um Ga<sub>2</sub>O<sub>3</sub> aperture layer containing an aperture with the length of 20 um, two current blocking layers (CBLs) located at both sides of the aperture formed by nitrogen implantation, a 0.15 um Ga<sub>2</sub>O<sub>3</sub> channel layer, two n<sup>+</sup>-Ga<sub>2</sub>O<sub>3</sub> contact regions for the source and drain, and a 50 nm Al<sub>2</sub>O<sub>3</sub> layer as gate dielectric. The length of gate, gate to source, and gate to drain is 40 um, 10 um, and 9 um, respectively. For the mobility simulation of Ga<sub>2</sub>O<sub>3</sub>, field-dependent saturation velocity mobility model and thermal dependent mobility model were introduced. For the breakdown simulation of the devices, lattice heating model and impact ionization model were incorporated. Furthermore, the incomplete ionization model was used for both donors and accepters in Ga<sub>2</sub>O<sub>3</sub>, which is critical for the accurate simulation of the CBL region. The device model was calibrated with experimental results such as transfer curves and breakdown characteristics. It was found that the threshold voltage (V<sub>TH</sub>) of the devices was sensitive to and increased with the doping concentration in the channel layer. When the doping concentration in the channel layer was lower than 5×10<sup>17</sup> cm<sup>-3</sup>, the device changed from the depletion mode to the enhancement mode. Under zero bias, electric fields were concentrated between the gate and the CBL with a low breakdown voltage (BV) of 260 V, which is caused by insufficient gate control over the channel. Several gate structures will be investigated for the optimal BV-R<sub>ON</sub> performance, including p-Gate, deep-recessed gate and p-type recessed gate. These results can provide critical references for the future development of high-performance vertical β-Ga<sub>2</sub>O<sub>3</sub> power electronics.

Keywords

microstructure | oxide

Symposium Organizers

Robert Kaplar, Sandia National Laboratories
Srabanti Chowdhury, Stanford University
Yoshinao Kumagai, Tokyo University of Agriculture and Technology
Julien Pernot, University of Grenoble Alpes

Publishing Alliance

MRS publishes with Springer Nature