MRS Meetings and Events

 

NM06.16.02 2022 MRS Fall Meeting

Low-Power Artificial Neural Networks and Logic-in-Memory Circuits with Monolayer MoS2

When and Where

Dec 7, 2022
8:30am - 9:00am

NM06-virtual

Presenter

Co-Author(s)

Andras Kis1

Ecole Polytechnique Federale de Lausanne1

Abstract

Andras Kis1

Ecole Polytechnique Federale de Lausanne1
Machine learning and signal processing on the edge are poised to influence our everyday lives with devices that will learn and infer from data generated by smart sensors and other devices for the Internet of Things. The next leap towards ubiquitous electronics requires increased energy-efficiency of processors for specialized data-driven applications. I will present here how we realised an in-memory processor fabricated using a two-dimensional materials platform can potentially outperform its silicon counterparts in both standard and non-traditional Von Neumann architectures for artificial neural networks. The circuits are based on a flash memory array with a two-dimensional channel using wafer-scale MoS<sub>2</sub>. Simulations and experiments show that the device can be scaled down to sub-μm channel length without any significant impact on its memory performance.

Keywords

Mn | S

Symposium Organizers

Nicholas Glavin, Air Force Research Laboratory
Aida Ebrahimi, The Pennsylvania State University
SungWoo Nam, University of California, Irvine
Won Il Park, Hanyang University

Symposium Support

Bronze
MilliporeSigma

Publishing Alliance

MRS publishes with Springer Nature