Noise and Variation in Memristive Devices and Crossbar Arrays

Memristors are resistance switches with reconfigurable multilevel resistance states modulated by an electric field. Crossbar arrays of such devices can perform analog computation at the site where data is stored (in-memory computing) by directly using physical laws, such as Ohm's law for multiplication and Kirchhoff's current law for summation. Analog in-memory computing reduces the time and energy needed to access system memory. The multiply-accumulate operations can be performed through a single current sensing operation, dramatically increasing the computing throughput. However, ionic-based devices have noises due to the random trapping/release of charge carriers at thin-film interfaces or defect sites (random telegraph noise) and the fluctuation of defect concentrations (1/f noise). Together with thermal and shot noises, they impose a fundamental limit on the capability of analog computing. Furthermore, the device-to-device variation remains a challenge for large-scale crossbar arrays. In this talk, we will showcase how we mitigate these issues through precise conductance tuning of the devices to achieve an unprecedentedly large number of conductance states. We will then discuss the algorithm-hardware co-design approach for edge computing with the memristive crossbar arrays. Finally, we will explore utilizing the variation in the crossbar arrays for embedded hardware security applications.