Inge Asselberghs1
IMEC1
It turned into a never-ending success story, the discoveries with layered 2D-materials have led to a good understanding of the material properties and the identification of a broad range of potential application zones like sensors, photonics, spintronics and electronics [1, 2]. One of the most challenging approaches of having 2D-based circuits for high-performance logic is considered [3, 4]. While the list of material options keeps increasing, the request to demonstrate manufacturability is ramping up fast. The performance gap between synthetic materials and natural crystals is decreasing rapidly. Recently, a paper by Liu et al. [5] shows the mobility improvement up to 120 cm2/Vs for bilayer MoS2. This emphasis the urge to enable pathfinding experiments to close the gaps associated to identified process challenges [3, 6] and conduct pathfinding integration exercises in a 300 mm fab environment [7].<br/><br/>Therefore, a simplified single transistor test vehicle in a 300mm fab is required to allow the exploration of material selection and process condition identification at single device level. Here, wafer scale assessment provides insights in device-to-device, die-to-die and wafer-to-wafer variability. Combined with inline metrology, a unique insight can be given on the individual process steps and their impact on the channel properties. For example, acoustic wafer maps provide a unique way to reveal adhesion related effects. Once this exploration is done, a more elaborated integration route can be conducted.<br/><br/>[1] Lemme et al., Nat Commun (2022). https://doi.org/10.1038/s41467-022-29001-4<br/>[2] Huang et al,. npj 2D Mater Appl (2022). https://doi.org/10.1038/s41699-022-00327-3<br/>[3]Schram et al, Advanced materials, (2022). https://doi.org/10.1002/adma.202109796<br/>[4] https://www.eenewsanalog.com/en/iedm-tsmc-to-report-2d-nanosheet-transistor/<br/>[5] Liu et al, Nature (2022). https://doi.org/10.1038/s41586-022-04523-5<br/>[6] Maxey et al., IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), (2022). doi: 10.1109/VLSITechnologyandCir46769.2022.9830457.<br/>[7] Q. Smets et al., 2021 IEEE International Electron Devices Meeting (IEDM), (2021), doi: 10.1109/IEDM19574.2021.9720517.