Ferroelectric Tunnel Junctions for Compute-in-Memory

Energy efficient computing is one of the major challenges of today’s semiconductor industries. To support the artificial intelligence (AI), the computation is more memory centric and requires frequent access beyond the cache. Data shuttling (known as “memory wall”) is identified as the main bottleneck for such implementation of AI with the current von Neumann architecture. Modifying the computing system is a potential option for circumventing this bottleneck, and among different computing architectures, computing inside memory (CIM) is the most energy-efficient for eliminating the memory wall of state-of-the-art processors. It has been shown that the non-volatile memories in the cross-point architecture can potentially improve the system efficiency significantly from below one to a few hundred TOPS/W. Different non-volatile memories including resistive random-access memory (RRAM), phase change memory (PCM), magnetic RAM and ferroelectric (FE) based devices i.e., FeRAM, FeFET and tunnel junctions (FTJs) are actively studied for efficient non-volatile memory and CIM applications. Recently, HfxZr1-xO2 (HZO) FE materials have attracted significant attention as embedded non-volatile memory (eNVM) due to thickness scalability and CMOS back-end-of-line (BEOL) compatibility [1]. In particular, it has been shown experimentally that cache-level memory with much lower refresh power can be enabled by HZO-based low-voltage FeRAM with endurance of &gt;1012 cycles for high-speed read/write operations at elevated temperatures [2-4]. These devices are designed based on the fundamental understanding from multi-domain phase-field device-level framework for polycrystalline HZO FE and anti-ferroelectric (AFE) thin films [5]. However, compared to memory options in conventional memory hierarchy, the performance requirements such as write and read energies, endurance as well as retention are different in CIM applications, and thus device technology co-optimization is critical. Among different resistive memory devices, FTJs are of particular interest as they offer the lowest switching energy, high endurance and retention.<br/>FTJ is a two-terminal device with a ferroelectric layer sandwiched between two electrodes. The resistance of this device changes based on the polarization of the FE layer. Depending on either complete or partial switching of the FE layer, FTJ can be used for digital or analog CIM. In this work, we will demonstrate HZO- based planar FTJs with very low write current (3.8×101 A/cm2 ) and voltage (1 V) by material and structural engineering. Here, we optimize FTJs’ performance for read ON current (10-3 A/cm2 at 0.3V), ON/OFF ratio (7), endurance (&gt;1010), retention (100 s), and nonlinearity (0.01/-2.4) with 16 individual states for analog CIM. The write pulse of our planar FTJs can be scaled down to 250 ns without degradation in performance, and it is expected that polarization switching can be as fast as 2 ns in scaled dimensions [2]. There are still challenges (i.e., low read current, ON/OFF ratio, retention etc.), which need to be solved for the technological implementations of FTJs for CIM. However, we show that a high accuracy of ~90% is achieved in recognizing digits from Modified National Institute of Standards and Technology (MNIST) dataset by our FTJs with both binary and multiple states [6]. These results highlight that HZO-based FTJs are promising for high performance non-volatile memories and electrical synapses. [1] T. Mikolajick et al., “Next generation ferroelectric materials for semiconductor process integration and their applications,” J. of Appl. Phys. 129, 100901 (2021). [2] S. -C. Chang et al., " Anti-ferroelectric HfxZr1-xO2 Capacitors for High-density 3-D Embedded-DRAM," 2020 IEEE International Electron Devices Meeting (IEDM), 2020, pp. 28.1.1-28.1.4.