Jimin Han1,Boyoung Jeong1,Tae-Sik Yoon1
Ulsan National Institute of Science and Technology1
Jimin Han1,Boyoung Jeong1,Tae-Sik Yoon1
Ulsan National Institute of Science and Technology1
The demand on high-density and high-performance non-volatile memories is increasing for emerging data-centric applications. Among various non-volatile memories, a memory adopting a single metal-oxide-semiconductor field-effect transistor (1-MOSFET) operates with the modulation of the channel conductance to store the information. Mechanism of the channel conductance modulation is largely dependent on the properties of gate stack composed of semiconductor channel and gate oxide layers. One of the most representative 1-MOSFET memory to modulate the channel conductance is a floating-gate (charge-storage node or charge-trap layer) memory cell comprising a flash memory. This cell performs memory functions in the charge-storage-based way that the threshold voltage is shifted as a result of electrical charging of the floating gate (or charge-storage node) by tunneling of electrons through tunneling oxide upon voltage application to the control gate. Alternative way includes the use of a non-charge-storage-based (or ion-based) memory operation by tuning gate stack properties such as the changes in carrier mobility and dopant concentration in the channel layer, and gate oxide capacitance. There have been extensive efforts to make advance in 1-MOSFET memory to fully exploit its high density integration capability with a low cost per bit. Nevertheless, it is still challenging to achieve low operation voltage as well as high operation speed, which are particularly crucial for the application to energy-efficient computing systems that perform data-processing cooperated with memory units. In this study, charge-storage-based and non-charge-storage-based 1-MOSFET non-volatile memory were investigated to achieve low voltage operation in oxide-semiconductor thin-film transistor (TFT) with various gate stacks. For example, the memory with an indium-zinc oxide (IZO) channel layer and an oxygen-deficient HfO<sub>2-x</sub> gate oxide deposited by sputtering exhibited non-charge-storage-based non-volatile memory characteristics, where the channel conductance was modulated as driven by oxygen ion exchange between gate oxide and channel layers. The device with an indium-gallium-zinc oxide (IGZO) channel layer and HfO<sub>2-x</sub> gate oxide deposited by atomic layer deposition showed the charge-trap memory properties with threshold voltage shift by electrical charging in the oxygen-deficient low-temperature ALD HfO<sub>2-x</sub> charge-trap layer. In particular, the UV/ozone treatment of interface between gate oxide and oxide semiconductor channel layer adjusted the electrical charging and oxygen ion exchange behaviors. The memory with ZnO channel layer and NbO<sub>x</sub> gate oxide showed also the charge-trap memory characteristics thanks to the high trap density in NbO<sub>x</sub> as a charge-trap layer. These presented devices exhibited various non-volatile memory characteristics such as gate voltage polarity-dependent programming and erasing operations, the good retention of memory states and endurance properties upon repeated operations. In addition, since these devices did not adopt the tunneling oxide, thus enabled lower voltage operation compared to conventional floating-gate memory cell. These results demonstrated that the properties of gate stack layers including oxide semiconductor, ion-exchange layer, charge-trap layer, and interfacial tunneling oxide formation by post-deposition treatments could be adjusted, and consequently determine charge-storage-based or non-charge-storage-based non-volatile memory functions with the low voltage operation for energy-efficient computing systems.