Heat Dissipation in 2D Material Transistors: The Role of Interfaces and Contacts

While promising candidates for next-generation transistors, two-dimensional (2D) semiconductors like MoS₂ suffer from unique challenges due to the van der Waals gaps at their interfaces. These have made it difficult to achieve good electrical contacts, and they also result in relatively high thermal boundary resistances (TBR) to adjacent materials [1, 2]. In much the same way the electrical contact resistance is a key limiter of performance for nanoscale 2D transistors, the TBR is a major bottleneck for the cooling of these devices [2]. Coupled with their atomically thin channel which has limited capability of in-plane heat transport, this results in elevated temperatures during operation, reducing mobility [3] and posing thermal degradation and reliability concerns [4].<br/><br/>Here, we present fast analytical thermal models for common 2D transistors, carefully taking into account their thermally-resistive interfaces, contact geometry and other non-idealities. We first develop a steady-state thermal model for simple back-gated transistors, which quantifies the device temperature for a given power input. This model elucidates the cooling mechanisms for a wide range of device geometries and material combinations, highlighting in particular the crucial role of the contacts. Notably, scaling down the channel length does not necessarily lead to improved cooling performance as commonly assumed, because metal contacts are not ideal heat sinks for typical 2D material TBR and thermal conductivity values. Next, we extend this work into frequency-dependent models that can estimate the complex-valued device thermal impedance, which characterizes the amplitude and phase of temperature oscillations for sinusoidally-varying power. These models can be used to predict device thermal time constants, as well as to compute the temperature response to arbitrary power pulses, through an inverse Fourier transform. Finally, we generalize our models to top-gate and dual-gate FETs by accounting for the heat transferred to the contacts via the top gate. We validate our models against finite-element method simulations, with a worst-case temperature error of &lt; 18% across typical device geometries and material/interface properties.<br/><br/>Key insights gained from this work include: (1) the thermal resistance of 2D transistors is relatively insensitive to channel length for sub-100 nm devices, which are dominated by their contact thermal resistance, (2) the short-channel transistor thermal resistance is influenced equally by the 2D material TBRs and the in-plane thermal conductivity, while also depending on contact geometry, (3) due to their ultrathin channel, thermal time constants of 2D transistors are often sub-nanosecond, making it difficult to probe intrinsic device performance (i.e. not limited by self-heating) with pulsed electrical measurements, and (4) top gates can lower temperatures by as much as 30% and 50% for wide and narrow (~50 nm width) devices, respectively.<br/><br/>In addition to their utility in guiding transistor design and optimization, predicting temperatures, estimating transient heating and cooling rates, and detailing pathways for heat flow, our fast analytical thermal models for 2D transistors can also be packaged into direct-current (DC), alternating-current (AC) and transient electrical compact models which incorporate self-heating. This work was supported in part by the Stanford SystemX Alliance, by the Semiconductor Research Corporation (SRC) and DARPA JUMP Centers, and by the National Science Foundation (NSF) Engineering Research Center for Power Optimization for Electro-Thermal Systems (POETS).<br/><br/>[1] E. Yalon, E. Pop <i>et al.</i>, <i>ACS Appl. Mater. Interfaces</i> <b>9</b>, 43013 (2017). [2] A. J. Gabourie, Ç. Köroğlu, E. Pop, <i>J. Appl. Phys.</i> <b>131</b>, 195103 (2022). [3] C. J. McClellan, E. Pop <i>et al.</i>, <i>ACS Nano </i><b>15</b>, 1587 (2021). [4] E. Yalon, E. Pop <i>et al.</i>, <i>Nano Lett.</i> <b>17</b>, 3429 (2017).