A SiO_x Resistive Memory with Low Operating Voltages, Gradual Set/Reset Operation and High On-State Non-Linearity

Resistive Random-Access Memory (RRAM) technology is a promising candidate for next-generation non-volatile memory and neuromorphic circuit applications. Many high-<i>k</i> metal-oxides such as HfOx, TiOx and AlOx have been extensively studied to develop RRAM devices.¹ Despite full CMOS compatibility and low cost of fabrication, SiOx RRAMs have received relatively less attention. Previous works on SiOx RRAMs typically report high electroforming and/or high switching voltages.^2,3 In this work, we demonstrate a SiOx RRAM with low switching voltages, high non-linearity and near-gradual set/reset operation. Crossbar devices with dimensions ranging from 2 mm to 10 mm were fabricated using Au (50 nm) as the bottom electrode, SiOx as the switching layer and Ti/Au as the top electrode. Thickness of the Ti top electrode was varied from 5 nm to 15 nm while the thickness of the Au capping layer was fixed at 50 nm. The SiOx films were deposited using inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) at a deposition temperature of 100 °C and RF Power of 300 W. Bottom and top electrodes were fabricated using photolithography and electron-beam evaporation. The devices show bipolar resistance switching after an initial electroforming step. The forming voltage can be reduced either by reducing the SiOx thickness or by increasing the Ti electrode thickness. The devices with 10.8 nm SiOx and 10 nm Ti electrode thickness exhibit set and reset operation at ~ 1V and -1.5V, respectively. Low cycle-cycle variability is observed for Vset and Vreset (~ 1% and 4.6% standard error, respectively). The switching characteristics at 100 µA compliance indicate gradual set/reset operation and high (~10) non-linearity in the on-state. However, the abruptness of resistance change during the set operation slightly increases at higher current compliance. Non-linearity observed in the on-state can be beneficial for suppression of sneak-paths in large crossbar arrays. The on-state resistance increases with decreasing device area, indicating an interfacial effect dominating the resistance switching mechanism. Detailed investigation of the switching mechanism by temperature dependent electrical measurements and transmission electron microscopy (TEM) will be presented. Overall, our results offer promise for SiOx RRAM as a low-cost, fully CMOS compatible technology suitable for low-power neuromorphic applications.<br/><b>REFERENCES:</b><br/>1. H. S. P. Wong et al., “Metal-Oxide RRAM”, <i>Proceedings of the IEEE</i>, vol. 100, pp. 1951-1970, 2012.<br/>2. A. Bricalli et al., “Resistive Switching Device Technology Based on Silicon Oxide for Improved ON–OFF Ratio—Part I: Memory Devices”, <i>IEEE Transactions on Electron Devices</i>, vol. 65, no. 1, pp. 115-121, 2018.<br/>3. A. Mehonic et al., “Silicon oxide (SiOx): A Promising Material for Resistance Switching?”, <i>Advanced Materials</i>, vol<i>. </i>30, p. 1801187, 2018.