Investigation of Local Parameters of PERC Solar Cells Metallized with Screen Printed Cu-Paste

We report on copper (Cu) screen print metallization of silicon (Si) solar cells and analyze the performance loss factors due to this new metallization process by mapping of local parameters for large area Passivated Emitter Rear Contact (PERC) solar cells. In order to reach about 40 TW of PV required to transition our planet to renewables, the silver (Ag) should disappear from PV production and get replaced with more abundant and cheaper material. Cu is an excellent alternative to Ag; being cheap and exhibiting similar electrical resistivities. But there are challenges associated with it like easy oxidation, diffusion into the Si cell and recombination activity. Most of the work that has been carried out in case of Cu involves electroplating to get a high aspect ratio metal contact, but it requires additional masking steps like photolithography. Thus, screen printing, a dominant metallization technology, is a potentially inexpensive solution for Cu metallization on c-Si solar cell. The selective emitter PERC cells were developed on M6 sized monocrystalline p-type wafers with a front grid screen-printed with Cu paste and partial Al contacts at the rear side. Although the champion cells have a fill factor (FF) ~77%, we have investigated the solar cells with very low FF (62% to 68%) in order to understand the reason behind the low FF. FF loss analysis indicates that there is ~13.35% loss due to series resistance (Rs), ~4.5% loss due to J₀₂ and a negligible loss of ~0.07% due to shunt resistance (R_sh). Our primary motivation for mapping these parameters is to investigate whether the low FF is a result of non-uniformity or overall low value of these parameters. Photoluminescence (PL) imaging was performed at different load conditions including short circuit and open circuit conditions under 1 sun illumination with source excitation of 808 nm and exposure time of 0.5sec. Electroluminescence (EL) imaging was also carried out at different applied voltages in the dark. The PL and EL images at different bias conditions are used to generate the R_smaps. Dark Lock-in Thermography (DLIT) using a thermal camera was measured at a reverse bias and three forward biases (0.508V, 0.547V, 0.631V) which were subsequently used for local IV analysis based on 2-diode model to generate maps for R_sh, J₀₁ and J₀₂. Even at short-circuit conditions, the PL images show some bright patches, which indicate that contact formation has not taken place in those areas. At open circuit conditions, the PL images still show those bright patches at the edges but is very uniform over most the surface. In the EL images, the non-contacted regions are dark, while the remaining areas are quite uniform. Thus, from the PL and EL images at different bias conditions, it is observed that the overall contact formation is uniform barring a few places at the edges indicating that the series resistance is uniform but high over the entire surface. The reason behind the high R_s can be high contact resistance at Cu/Si interface which needs further investigation. The DLIT image in the reverse bias is also mostly uniform and dark over the entire surface supporting our FF loss analysis of low R_sh loss. But the DLIT images in the forward biases show non-uniform spots in the interior of the cells which become prominent as higher bias voltages are applied. These spots, which were not visible in EL or PL images indicate non-uniformity of J₀₁ and J₀₂. Further studies to investigate the interfaces will be done to understand the source of non-uniformity of J₀₁ and J₀₂, diffusion of Cu atoms and the role of the barrier layer between Cu and silicon. We intend to study the diffusion of Cu into Si by SIMS, XRD, TEM, Raman spectroscopy and AFM and present it at the conference.The use of screen printable Cu pastes can reduce the cost of PV production processes to a great extent and hence, is of extreme relevance to the PV community.