Pixel Pitch Hybrid Bonding and Three Layer Stacking Technology for BSI Image Sensor

Abstract<br/>We have developed a pixel pitch (1.35 µm) hybrid wafer bonding technology and successfully demonstrated three layer stacked backside illuminated (BSI) image sensor fabrication with full hybrid Cu-Cu direct bonding process. We found that plasma activation condition on the bonding wafer surface is a key factor of Cu-Cu contact yield improvement for smaller size Cu contacts. Optimized pixel pitch hybrid bonding shows good electrical and reliability performances. For three layer stacking, we developed through Si via (TSV) process. The second hybrid bonding process was adapted on the first hybrid bonded wafers and it shows good electrical performances. This three layer stack technology with pixel pitch hybrid bonding is promising for many different applications.<br/>1. INTRODUCTION<br/>Nowadays, hybrid wafer bonding with Cu-Cu connection is a major production technology of two layer stacked backside illuminated (BSI) image sensor applied for several applications [1]. In addition, three layer stacked BSI image sensor with through Si via (TSV) connection has been introduced to high performance cameras [2]. Furthermore, three layer stacked BSI with pixel pitch Cu-Cu connection will be required in order to realize much higher performance and multi functionality image sensors. In this paper, we developed key technologies for three layer stacking. One is pixel pitch hybrid wafer bonding with minute Cu-Cu connection, the other is three layer stacking process including TSV for middle layer and the 2nd hybrid wafer bonding. Finally, three layer stacking process was demonstrated by adapting these technologies.<br/>2. PIXEL PITCH HYBRID BONDING<br/>Cu-Cu contact with conventional hybrid wafer bonding conditions was studied utilizing the test element group (TEG) structure of Cu-Cu connection. The Cu-Cu contact pitch is 4.00 to 1.35 µm, and Cu electrode size is 1.25 to 0.42 µm square. As the results, Cu-Cu contact yield decreased as the contact pitch and pad size became smaller. The failure was Cu-Cu open mode with small gap between upper and lower Cu electrode. Cu-N compound layer on Cu electrode surface was identified after plasma surface activation by wafer bonder. It indicates that Cu-N compound layer was formed because Nitrogen was dosed into Cu surface during plasma activation. We considered that the Cu-N compound layer formed on both upper and lower minute Cu electrode was not broken by compressive stress of Cu thermal expansion during post annealing. Therefore, the Cu-N layer acted as a barrier, and Cu-Cu metal bonding between minute electrodes was not achieved.<br/>N/Cu ratio of Cu electrode surface was decreased with lowering N dose of plasma condition and 1.35 µm pitch Cu-Cu contact yield (438k chains TEG) was improved. The Qual test of 1.91 µm pitch Cu-Cu contact (0.60 µm sq.) namely, electro migration (EM), stress migration (SM), temperature cycling (TMCL) and I-V, were passed.<br/>3. THREE LAYER STACKING DEMONSTRATION<br/>Three layer stacking was demonstrated following flow; The middle layer is bonded to the top layer by the 1st hybrid bonding with 1.91 µm pitch Cu-Cu connection. After the middle layer Si thinning, the Cu-TSV and the backside BEOL are formed. Then the 2nd hybrid bonding is done in order to bond the backside of the middle layer to the bottom layer with Cu-Cu connection. Finally, top layer Si is thinned and Al-TSV through top layer Si is formed. The stack chain TEG (10 chain circuit through Al-TSV, the 1st hybrid pixel pitch Cu-Cu, Cu-TSV, back BEOL and the 2nd hybrid Cu-Cu) shows the small resistance distribution. As the results, good electrical path of three layer stacking was established.<br/>REFERENCES<br/>[1] Y. Kagawa et al., “Novel Stacked CMOS Image Sensor with Advanced Cu2Cu Hybrid Bonding,” Proc. of IEEE Int. Electron Devices Meeting (IEDM), 2016, pp.208-211.<br/>[2] Y. Kagawa et al., “3D Stacking Technologies for Advanced CMOS Image Sensors,” Proc. of IEEE Int. Interconnect Technology Conf. (IITC), 2021, WS-4.