Nanoelectronic Activation Neurons for Full Hardware Implementation of Neural Networks

Emerging nanoelectronics devices offer an attractive solution to minimize off-chip data transfer and parallelize on-chip computations for hardware implementation of neural networks. While substantial progress has been made towards development of synaptic devices, compact nanodevices implementing non-linear activation functions have been yet to be demonstrated. In this talk, I will present our work on energy-efficient and compact activation neurons and their successful integration with a conductive bridge random access memory (CBRAM) crossbar arrays in hardware. The activation neuron implements the rectified linear unit function in the analogue domain. I will discuss system level performance gains enabled by activation devices and conclude my talk by presenting large-scale image edge detection using the Mott activation neurons integrated with a CBRAM crossbar array in hardware.