Greyson Christoforo1,Henry Snaith1
University of Oxford1
Greyson Christoforo1,Henry Snaith1
University of Oxford1
Solar cell researchers can often be laser-focused on understanding the electrical performance of their device stack. They can sometimes forget that the I-V curves they measure are a function not only of the device stack, but also of the device layout materials and design. This consideration is especially important when the solar cell device relies on a transparent conductor because of the tradeoff between optical transmission and electrical conductivity required there. Deep understanding of how current flows through the device stack and ultimately out to the external contact points is important for any solar cell device maker, especially when troubleshooting systemic device fabrication issues like shunting. Quantifying how voltage drops along this current path is also important to be able to find an accurate upper performance limit one can expect from any given solar cell layout design. Here I will discuss tools and techniques any researcher can use to analyze their own lab's device layout so that they can quantify and understand the current flow in their device's electrodes and how voltage drop there might be impacting their measured performance.