Design of a Source Field-Plated Deep-Depletion Diamond MOSFETs

In the context of power semiconductor devices, ultra wide bandgap (UWBG) materials offer increased critical electric fields compared to wide-bandgap (WBG) materials [1]. It is the case of monocrystalline diamond which exhibits outstanding physical and thermal properties with, especially, a large critical electric field of 10MV.cm^-1 [2] allowing to reach high breakdown voltages. This property combined to the reduced on-state resistance at high junction temperatures (typically 450K) makes diamond power devices a promising challenger to 4H-SiC and GaN based power devices [1]. Recently, a fabricated deep-depletion diamond (D3) MOSFET has reached a critical electric field of 5.4MV.cm^-1 [3], far from the estimated 10MV.cm^-1. Two-dimensional numerical simulations have pointed out an electric field crowding effect under the gate in both diamond and oxide (Al₂O₃) layers leading to a premature breakdown of the gate oxide at a drain-source bias of –175V. Consequently, in the view of achieving a 1kV breakdown voltage, specific designs are required to reduce the edge effects. One possible solution to reduce the electric-field crowding effect under the gate is the design of a field-plate, as proposed for Ga₂O₃ power devices [4].<br/><br/>In this work, a source-field plated diamond MOSFET is designed to match the requirement of 1kV breakdown voltage. The device architecture is based on the lateral deep-depletion diamond MOSFETs which has been previously introduced [3]. Compared to this design, a passivation layer with Si₃N₄ is added underneath the field-plate to ensure a proper isolation of the active device. To quantify the capabilities of such design, two-dimensional device simulations are performed using Silvaco ATLAS to determine the optimal sizing for the field-plate. Thereby, various field-plate extensions at the drain side, L_FP, and field-plate heights, h_FP, are investigated. Preliminary simulation results show a reduction of the peak electric field under the gate in both diamond and gate oxide layers, thus improving the device breakdown voltage up to 1kV, an improvement of more than 500% compared to the lack of field-plate. However, a special care must be paid to the passivation layer thickness as an electric field crowding effect appears at the field-plate edge that could cause a premature breakdown of the power device due to the passivation layer. Nevertheless, the source field-plated design shows attractive performances that could improve the current state-of-the-art of diamond power transistors in terms of experimental breakdown voltage vs on-state resistance.<br/><br/>[1] N. Donato, N. Rouger, J. Pernot, G. Longobardi, and F. Udrea, “Diamond power devices state of the art, modelling, figures of merit and future perspective,” Journal of Physics D Applied Physics, vol. 53, p. 093001, dec 2019.<br/>[2] Atsushi Hiraiwa and Hiroshi Kawarada, "Figure of merit of diamond power devices based on accurately estimated impact ionization processes,” Journal of Applied Physics 114, 034506 (2013) https://doi.org/10.1063/1.4816312<br/>[3] C. Masante, N. Rouger, and J. Pernot, “Recent progress in deep-depletion diamond metal-oxide-semiconductor field-effect transistors,” Journal of Physics D: Applied Physics, vol. 54, p. 233002, mar 2021.<br/>[4] M. H. Wong, K. Sasaki, A. Kuramata, S. Yamakoshi and M. Higashiwaki, "Field-Plated Ga₂O₃ MOSFETs With a Breakdown Voltage of Over 750 V," in <i>IEEE Electron Device Letters</i>, vol. 37, no. 2, pp. 212-215, Feb. 2016, doi: 10.1109/LED.2015.2512279.