MRS Meetings and Events

 

EN06.06.01 2022 MRS Fall Meeting

Architectures for High-Efficiency Crystalline Silicon Solar Cells

When and Where

Dec 1, 2022
3:15pm - 3:45pm

Hynes, Level 3, Room 301

Presenter

Co-Author(s)

Olindo Isabella1,Miroslav Zeman1,Yifeng Zhao1,Manvika Singh1,Luana Mazzarella1,Arthur Weeber1

Delft University of Technology1

Abstract

Olindo Isabella1,Miroslav Zeman1,Yifeng Zhao1,Manvika Singh1,Luana Mazzarella1,Arthur Weeber1

Delft University of Technology1
At present, crystalline silicon (c-Si) based solar cells dominate the PV market. There is a continuous effort to improve the conversion efficiency of c-Si solar cells by developing and optimizing different c-Si solar cell architectures.<br/><br/>Front/back-contacted silicon heterojunction (FBC-SHJ) solar cells have exhibited efficiencies well above 26% [1]. To achieve such high efficiencies, the material quality of (<i>i</i>)a-Si:H passivating layer is critical, ensuring excellent surface passivation and facilitating charge carrier collections in SHJ solar cells. Fourier-transform infrared spectroscopy (FTIR) was used to study the quality of (<i>i</i>)a-Si:H layers deposited in the range from 140°C to 200°C. FTIR results showed that (<i>i</i>)a-Si:H films were less dense when deposited at lower temperatures, thus hindering their surface passivation capabilities. However, with additional hydrogen plasma treatments (HPTs), the (<i>i</i>)a-Si:H layers deposited at lower temperatures the passivation qualities was significantly improved in contrast to their counterparts deposited at higher temperatures. Further, for monofacial solar cells with screen-printed Ag contacts we observed highest <i>V</i><sub>OC</sub>s for cells with (<i>i</i>)a-Si:H deposited at the lowest temperature (140°C), however, the related <i>FFs</i> are poorer as compared to their higher temperature counterparts. The optimum trade-off between <i>V</i><sub>OC</sub> and <i>FF</i> for the SHJ cells was found with temperatures ranging from 160°C to 180°C. Based on our FTIR study, this trade-off reveals two critical requirements for optimizing the (<i>i</i>)a-Si:H layers in high-efficiency SHJ solar cells: (i) excellent surface passivation quality to reduce losses induced by interface recombinations and (ii) less-defective (<i>i</i>)a-Si:H bulk to not disrupt the charge carrier collections.<br/><br/>Moreover, reducing indium (In) and silver (Ag) consumption is a crucial challenge for scaling up SHJ solar cell technology towards terawatt level implementation. We performed optical modelling and electrical studies to optimize TCO thicknesses [2]. Instead of standardly used 75-nm-thick tin-doped indium oxide (ITO) on the illumination side, we applied 50-nm-thick tungsten-doped indium oxide (IWO) plus 100-nm-thick SiO<i><sub>x</sub></i> forming a double-layer antireflection coating (DLARC), which concurrently reduces the thickness of the TCO and improves the optical response of the monofacial SHJ solar cells. To reduce Ag use, we utilized electroplated Cu for forming the front metal grid [3]. The best monofacial SHJ solar cell fabricated in this study achieved <i>V</i><sub>OC</sub> of 726.0 mV, <i>J</i><sub>SC</sub> of 39.97 mA/cm<sup>2</sup>, <i>FF</i> of 83.3% and efficiency of 24.18%. We demonstrated Cu-plated bifacial SHJ solar cells with DLARCs exhibiting efficiencies &gt; 22% (<i>n</i>-side illumination) by applying 25-nm-thick IWO and ITO for <i>n</i>- and <i>p</i>- contact, respectively [2]. This represents a 78% reduction in TCO use as compared to our lab-standard 75 nm plus 150 nm TCO utilization in monofacial SHJ solar cells.<br/><br/>High-thermal budget carrier selective passivating contacts (CSPCs) based on poly-SiO<sub>x</sub> [4],[5],[6], are another excellent candidates for high-efficiency c-Si solar cells. We obtained 690 mV i-V<sub>oc</sub> on poly-SiO<sub>x</sub> / textured c-Si surfaces using the 2-step annealing approach. High passivation quality was achieved for both p and n type poly-SiOx CSPCs. With the developed poly-SiOx CSPCs, we fabricated 4-cm<sup>2</sup> large, screen-printed single side textured (SST) single junction c-Si solar cell with a certified efficiency of 20.47%. Likewise, a certified efficiency of 18.57% was obtained for a double side textured (DST) cell with poly-SiOx CSPC.<br/> <br/>This work was supported by Dutch NWO Joint Solar Program III.<br/> <br/>[1] LONGi Solar, <b><i>news release</i></b> (2021)<br/>[2] C. Han, et al., <b><i>Prog. </i></b><b><i>Photovoltaics</i></b> (2022)<br/>[3] C. Han, et al., <b><i>Solar RRL</i></b>, 2100810 (2022)<br/>[4] G. Yang, et al., <b><i>Appl. </i></b><b><i>Phys. Lett.</i></b>, (2018)<br/>[5] M. Singh, et al., <b><i>Sol. Energy Mater. Sol. Cells</i></b>, (2020)<br/>[6] G. Yang, et al., <b><i>Prog. </i></b><b><i>Photovolt. Res. Appl.</i></b>, (2021)

Symposium Organizers

Emily Warren, National Renewable Energy Laboratory
James Bullock, The University of Melbourne
Ivan Gordon, IMEC
Xinyu Zhang, Jinko Solar

Symposium Support

Bronze
Jinko Solar Co., Ltd.
National Renewable Energy Laboratory

Publishing Alliance

MRS publishes with Springer Nature