Symposium Organizers
Seyoung Kim, IBM T.J. Watson Research Center
Barbara De Salvo, Leti, CED-TECH
Hyunsang Hwang, Pohang University of Science and Technology
Shimeng Yu, Arizona State University
Symposium Support
Journal of Applied Physics | AIP Publishing
EM07.01: Deep Learning and Its Implication on Materials Research
Session Chairs
Monday PM, November 27, 2017
Hynes, Level 1, Room 110
8:30 AM - *EM07.01.01
Towards End-to-End Trainable Analog Hardware for Deep Learning
Yoshua Bengio 1
1 , University of Montreal, Montreal, Quebec, Canada
Show AbstractAnalog hardware has the potential to provide non-linear computation with much lower energy consumption than traditional digital hardware, for example a single transistor being able to compute something similar to a multiplication, with extra non-linearities which do not correspond well to the kind of idealized computations that we normally find in neural network equations. Because of the imperfection of these computations (compared to idealized computations in our mathematical definitions) and because different instances of these operations end up being slightly different, current analog implementations are considered to provide very poor precision for these idealized computations. However, if we think of a neural network as a large non-linear machine with many parameters which are tuned end-to-end so as to obtain low-error outputs to given inputs, we do not need the individual computations to correspond to such idealized operations as multiplications, additions or ReLUs. Another practical issue is that a real circuit has dynamics, which quickly converge to some state when a new input is clamped, and in order to train such a circuit we need to take these dynamics into account. This talk will present new ideas towards building end-to-end trainable dynamical systems of the kind that analog hardware could potentially implement. This builds on a new credit assignment principle called Equilibrium Propagation and proposed to bridge the gap between back-propagation and synaptic changes in the brain.
9:00 AM - EM07.01.02
An Organic Artificial Synapse for Low-Energy Neuromorphic Computing
Yoeri van de Burgt 1 2 , Ewout Lubberman 2 5 , Elliot Fuller 3 , Scott Keene 2 , Gregorio Faria 2 6 , Matthew Marinella 4 , Sapan Agarwal 3 , Alec Talin 3 , Alberto Salleo 2
1 Institute for Complex Molecular Systems, Eindhoven University of Technology, Eindhoven Netherlands, 2 Materials Science and Engineering, Stanford University, Stanford, California, United States, 5 The Zernike Institute for Advanced Materials, University of Groningen, Groningen Netherlands, 3 , Sandia National Laboratories, Livermore, California, United States, 6 , Universidade de São Paulo, São Carlos Brazil, 4 , Sandia National Laboratories, Albuquerque, New Mexico, United States
Show AbstractThe widely anticipated end to Moore’s law and the growing demand for low power computing systems capable of learning, image recognition and real-time analysis of large streams of unstructured data has spurred intense interest in neural algorithms for brain-inspired computing.
Inspired by the efficiency of the brain, CMOS-based neural architectures were developed for low-power pattern recognition and machine learning. Still, the volatility, high supply voltages, and number of transistors required per synapse significantly complicate the path for CMOS-based architectures to achieve the extreme interconnectivity, information density, and energy efficiency of the brain. Alternatively, two-terminal tunable resistance elements (memristors) based on filament forming metal oxides (FFMOs) or phase change memory (PCM) materials have been demonstrated to function as non-volatile memory that can emulate synaptic functions, but they require high voltages and currents due to the inherent physics of their switching mechanism.
Here we present an electrochemical neuromorphic organic device (ENODe) operating with a fundamentally different mechanism from existing memristors [1]. This device switches at low energy and voltage, displays >500 distinct, non-volatile conductance states and achieves high classification accuracy when implemented in neural network simulations.
We also demonstrate that plastic ENODEs can be entirely fabricated on flexible substrates, introducing neuromorphic computing to large-area flexible electronics and opening up possibilities in brain-machine interfacing, adaptive learning of artificial organs, such as “smart skins”, and laying the foundation for 3D manufacturing of highly interconnected device networks.
[1] Y. van de Burgt et al. A non-volatile organic electrochemical device as a low-voltage artificial synapse for neuromorphic computing. Nature Materials 16, 414–418 (2017).
9:15 AM - EM07.01.03
Nonvolatile Synaptic and Activation Function Generator for Neuromorphic Accelerators
Saima Siddiqui 1 , Sumit Dutta 1 , Luqiao Liu 1 , C. A. Ross 1 , Marc Baldo 1
1 , Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show AbstractThe non-volatility and low energy consumption of spintronic and magnetic devices are advantageous in implementations of neural networks. In this work, we demonstrate that the application of non-volatile technologies to linear operations such as matrix convolution can be supplemented by the ability of spintronics to compute nonlinear functions such as thresholding.
Using simulations and optical characterization, we demonstrate that three terminal magnetic tunnel junctions can be designed to implement arbitrary monotonic nonlinear functions. The device is comprised of a magnetic nanowire for domain wall motion underneath a magnetic tunnel junction to measure the resistance. The spin-orbit torque from a heavy metal under the ferromagnetic nanowire controls the position of the domain wall underneath the tunnel junction, thereby modulating the resistance of the device. For application to linear operations, devices are built with uniform width along their length. But nonlinear operations can be performed by fabricating devices with varying widths such that the current-density and hence the spin-orbit torque is a nonlinear function of the domain wall position. Finally, we determine the resolution of these analog function evaluators in terms of the fundamental properties of the line-edge roughness of the magnetic nanowires.
9:30 AM - *EM07.01.04
Devices for Deep Learning
Tayfun Gokmen 1
1 , IBM T. J. Watson Research Center, Yorktown Heights, New York, United States
Show AbstractDeep learning has made significant progress and business impact in the past few years thanks to the availability of large amounts of training data and steady increase in the computational resources. There are many attempts both in industry and universities to reduce training times of large models by designing and using specialized hardware such as GPU, FPGA, or ASIC that relies on conventional CMOS-technology. Moreover, non-volatile memory technologies, such as PCM or RRAM, have been explored recently for acceleration of deep neural network (DNN) training. All of these bottom-up approaches using previously developed device technologies look very promising, however, the estimated acceleration factors are limited by device specifications intrinsic to their application as digital memory. In contrast, here we propose a top-down approach where ultimate acceleration of DNN training is achieved by design of a system and CMOS circuitry that imposes unique device requirements specifically targeting deep learning. This concept of resistive processing unit (RPU) devices can store and update the weights of the network locally and therefore fully utilizes the locality and parallelism of the training algorithm. We derive the required RPU device specifications by evaluating the effect of various device features and system parameters on training performance of wide variety of network architectures consisting of fully connected, convolutional or recurrent layers as well as LSTMs and GRUs. We show that RPU devices need to be analog in nature and respond symmetrically in up and down conductance changes with a voltage threshold. These specifications differ significantly from ideal memristive devices or typical devices used for memory applications and therefore guide the exploration of new materials and switching mechanisms. We also show that for large DNNs with about 1 billion weights massively parallel RPU based accelerators can promise an outstanding 30,000X acceleration in training time compared to state-of-the-art microprocessors while providing power efficiency of 84,000 GigaOps/s/W.
EM07.02: Electronic Synapse Design and Characterization
Session Chairs
Yoshua Bengio
Tayfun Gokmen
Monday PM, November 27, 2017
Hynes, Level 1, Room 110
10:30 AM - *EM07.02.01
Emerging Resistive Memory Technology for Neuromorphic and Machine Learning Inspired Computing
Manan Suri 1
1 Department of Electrical Engineering, Indian Institute of Technology, Delhi, New Delhi India
Show AbstractWe are live in an era which is more memory centric than ever before. Factors that contribute
to the ever increasing importance of memory are – (i) Saturation of Moore’s law, and (ii) Ease of
generating enormous amounts of data. The nature of present day data intensive applications is such
that, excellence in computational performance cannot be achieved alone on the basis of raw transistor
scaling or linearly increasing the number of processing cores. A fundamental shift in the vastly successful Von Neumann computational paradigm is needed to overcome the bottlenecks associated with data-intensive real time applications. This is where next generation advanced non-volatile memory begins to play an extremely important role. This invited talk attempts to discuss an overview of recent trends in the field of unconventional (non-Von Neumann) computing using emerging nonvolatile resistive memory technology (RRAM). In particular, we focus on case studies for dedicated hybrid CMOS-RRAM nanoscale hardware used in neuro-inspired, and machine learning driven architectures such as: (i) Extreme Learning Machines (ELM), (ii) Restricted Boltzmann Machines (RBM), and (iii) Unsupervised Spiking Neural Networks. Several different material stacks and flavors of emerging technologies such as –PCM, OxRAM, STT-MRAM, and CBRAM our considered.
11:00 AM - EM07.02.02
Synaptic Transistor with a Reversible and Analog Conductance Modulation Using Pt/HfOx/n-IGZO Memcapacitor
Paul Yang 1 , Hyung Jun Kim 1 , Geon Won Beom 1 , Jong-Sung Park 1 , Chi Jung Kang 1 , Tae-Sik Yoon 1
1 , Myongji University, Yongin Korea (the Republic of)
Show AbstractA synaptic transistor emulating the biological synaptic motion as an artificial synapse was demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-IGZO memcapacitor. From the operation scheme with three-terminal, the synaptic transistor differentiated from two-terminal memristor-based synapse is expected to have a modulation of synaptic weight, i.e. conductance of transistor, for learning operation by applying gate voltage. At the same time, the signal process can be performed through flowing current from source to drain by source-to-drain voltage. It implies that the learning operation to alter the memory state (synaptic weight) can be performed separately by applying gate voltage without disturbing the signal processing by pre- (source) and post-neuron (drain). In the present study, we demonstrated the synaptic transistor with memcapacitance phenomenon, i.e. a memorized capacitance change induced by either microscopic geometric changes or history-dependent permittivity changes of capacitor gate stack. First, the metal-oxide-semiconductor (MOS) memcapacitor with Pt/HfOx/n-IGZO structure exhibited analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V) curves by voltage sweep and pulse operations. As repeatedly applying a positive voltage to the Pt electrode (gate), the accumulation capacitance increased gradually and sequentially. The capacitance could be restored by repeatedly applying a negative voltage, confirming the reversible memcapacitance. The analog and reversible memcapacitance emulated the potentiation and depression synaptic motions. Employing this memcapacitor as a gate stack in the synaptic thin-film transistor (TFT), the synaptic weight modulation with gradually increasing drain current as repeatedly applying the positive gate and drain voltages and reversibly decreasing one as applying the negative voltages could be obtained. The reversible and analog conductance change in the transistor at both the voltage sweep and pulse operations could be controlled by the amplitude and polarity of gate voltage and repetition of gate and drain biasing. The analysis of transfer characteristics verified that the analog conductance change came from the modulation of oxide capacitance, mobility, and threshold voltage shift associated probably with the migration of oxygen ions. These results demonstrated the synaptic transistor using memcapacitance phenomenon induced by the interaction between oxide insulator and semiconductor channel layer (HfOx and IGZO).
11:15 AM - EM07.02.03
Utilization of Organic Transistors to Mimic Signal Transfer in Synapse Between Neurons and Investigate Their Applications in Neuromorphic Computing
Paddy K. L. Chan 1 , Xudong Ji 1
1 Mechanical Engineering, The University of Hong Kong, Hong Kong Hong Kong
Show AbstractDifferent from the von Neumann architecture in computers, our brain has more powerful properties including fault tolerance, ability to develop and learn as well as low power consumption. These characteristics make brain-like computation a very interesting topic to investigate. Varies kind of devices such as resistive memory, organic field effect transistor (OFET) with proton transfer dielectric or organic electrical chemical transistor (OECT) has demonstrated their potentials to mimic the signal transfer pattern at the synapse between neurons. In the current presentation, I will focus on how can we use a combined OECT and OFET to achieve the learning processing in the non- von Neumann architecture system with external stimulations. Both doped chitosan and poly(tetrahydrofuran) (PTHF)-based PEDOT will be used in these two family devices to regulate the paired pulse facilitation and thus the synaptic plasticity. Compared with the transistors with undoped Chitosan and PEDOT:PSS, the decay time constants of the excitatory post-synaptic current (EPSC) show an increase with more than one order of magnitude. Our device structure can be employed as a standard configuration for neuromorphic computing with external stimulation inputs.
11:30 AM - EM07.02.04
Design of Phase-Change Material with Distortion Effect by Dopants
Minho Choi 1 , Heechae Choi 2 , Sehyun Kwon 1 , Seungchul Kim 3 , Kwang-Ryeol Lee 3 , Jinho Ahn 1 , Yong Tae Kim 3
1 , Hanyang University, Seoul Korea (the Republic of), 2 , Virtual Lab. Inc., Seoul Korea (the Republic of), 3 , Korea Institute of Science and Technology, Seoul Korea (the Republic of)
Show AbstractPhase-change random access memory (PRAM) has been studied as a next-generation device component, which stores data through reversible phase change process between crystalline and amorphous state by electrical pulses. PRAM can be applied to neuromorphic system and storage class memory (SCM) due to fast speed, long retention, and low power consumption.
The distortion of atomic structure is a key factor to promote the phase change of materials and thus inducing electrical property variation. The material design with Ge-Sb-Te system has shown that vacancy and distortion can be controlled by change of composition1. An alternative way to control the vacancy and distortion is to add dopants in phase change materials (PCMs). Sb atoms in In3SbTe2 (IST) are partially substituted by Bi dopants2. As a result, the NaCl crystal structure of IST is slightly distorted by Bi-doping. The distorted inter-planar angles can be observed by TEM image, and these values are within the maximum range of inter-planar angles calculated by density functional theory (DFT). In addition, Bi doping induces In vacancy, and the atomic structure is more distorted with a larger inter-axial angle by formation of vacancy. This effect stabilizes the atomic system even more than pure IST.
To find the dopant that maximizes the effect of the distortion, we screened 29 elements through calculation of the enthalpy change and distortion angle induced by dopants. Yttrium was evaluated as one of proper dopants using DFT calculation, and the experiment results of Y-doped IST (YIST) were compared with DFT result. The IST system was considerably stabilized by Y dopant, and the distorted structure of YIST was melted more quickly by the same heating energy. The YIST PCM is expected to perform fast speed, long retention, and low power consumption as memory and neuromorphic device.
References
1. M. Wuttig et al. Nat. Mater. 6, 122 (2006).
2. M. Choi, et al. Sci. Rep. 5, 12867 (2015).
11:45 AM - EM07.02.05
LaMnO3+δ as a Functional Material for Next Generation Memristive Devices
Dolors Pla 1 , Quentin Rafhay 2 , Odette Chaix-Pluchery 1 , Raquel Rodriguez-Lamas 1 , Xavier Mescot 2 , Herve Roussel 1 , Michel Boudard 1 , Carmen Jimenez 1 , Monica Burriel 1 , Klaasjan Maas 1
1 CNRS, LMGP, Univ Grenoble Alpes, Grenoble, Rhone-Alpes, France, 2 CNRS, IMEP-LAHC, Univ. Grenoble Alpes, Grenoble, Rhone-Alpes, France
Show AbstractThe massive proliferation of connected devices is generating amazing amounts of new data. How to quickly convert these data into useful information and store them efficiently is a current constraint. Oxide-based memristors are being actively investigated beyond flash memories as memory and logic computer components because they combine the non-volatility with a low latency, a fast switching speed, a high compactness and a minimal power consumption [1]. In addition, neuro-electronics is a promising application for these oxide-based memristors, aiming to build artificial neuromorphic systems. In recent years, perovskites thin films have drawn much interest as functional materials for next generation of microelectronics and neuro-electronic devices due to their capacity to store multiple bits of information per element, to gradually tune their resistance, and to consume low energy for changing their resistance state [2], [3].
This work presents LaMnO3+δ (LMO) as a promising candidate to develop new memristive devices. The switching response of LMO films integrated in a thermomechanical stable heterostructure has been studied as a function of the LMO-thickness, the top electrode characteristics (i.e. metallic nature and size), and the electric field applied. Dense polycrystalline thin films are grown by pulsed injection metal-organic chemical vapor deposition on Pt/TiO2/SiO2/Si substrates through a two-steps deposition process. Bipolar resistive switching is attained with a high programming window using low set/reset voltages for all LMO configurations. Au/LMO-based devices are chosen to thoroughly study the switching characteristics. Several stable resistive states and different hysteresis are attained by tuning the voltage and the current compliance. Due to the p-type semiconductor nature of LMO, the commutation relies on a modification of the mobility of the charge carriers or of the free holes concentration. Since the resistance change can reach up to 3 orders of magnitude, the commutation cannot be explained only through changes in mobility of defect carriers. Therefore, a modification of the free holes concentration likely takes place. The electrode size independence of the resistance states indicates a filamentary nature of the current paths (most probably oxygen vacancies filaments), which might be locally confined within the LMO film. As the devices do not require a forming step, these conductive paths must be present before the first commutation. Therefore, it is assumed that some favourable paths lie within the grain boundaries and are activated during the switching. The possible conduction mechanisms governing each resistance state, i.e. conventional drift, diffusion and hopping transport, will be discussed for this promising material.
[1] G. W. Burr et al. IBM Journal of Research and Development 52, 4 (2008).
[2] W. Rainer et al. Adv. Mater. 21, 2632–2663 (2009).
[3] Y. Li et al. Sci. Rep. 4, 4906 (2014).
EM07.03: Material and Device Characterization for Bioinspired Computing
Session Chairs
Tayfun Gokmen
Rashimi Jha
Monday PM, November 27, 2017
Hynes, Level 1, Room 110
1:30 PM - *EM07.03.01
Strategies to Alter Retention and Switching Characteristics for Oxide-Memristors
Jennifer Rupp 1
1 , Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show AbstractThe next generation of information memories and neuromorphic computer logics in electronics rely largely on solving fundamental questions of mass and charge transport of oxygen ionic defects in materials and their structures. Here, understanding the defect kinetics in the solid state material building blocks and their interfaces with respect to lattice, charge carrier types and interfacial strains are the prerequisite to design new material properties beyond classic doping. Through this presentation basic theory1 and model experiments for solid state oxides their impedances and memristance2, electro-chemo-mechanics and lattice strain3-5 modulations are being discussed as a new route for tuning material and properties in ionic conducting oxide film structures up to new device prototypes based on resistive switching. Central are the making of new oxide film materials components, and manipulation of the charge carrier transfer and defect chemistry (based on ionic, electronic and protonic carriers)1-2, 5-6, which alter directly the resistive switching property and future computing performances. A careful study on the influence of microstructure and defect states vs. the materials` diffusion characteristics is in focus. For this, we suggest novel oxide heterostructure building blocks and show in-situ spectroscopic and microscopic techniques coupled with electrochemical micro-measurements to probe near order structural bond strength changes relative to ionic and electronic diffusion kinetics and the materials integration to new optimized device architectures and computing operation schemes.
1)Memristor Kinetics and Diffusion Characteristics for Mixed Anionic-Electronic SrTiO3-δ: The Memristor-based Cottrell Analysis Connecting Material to Device Performance
F Messerschmitt, M Kubicek, S Schweiger, JLM Rupp
Advanced Functional Materials, 24, 47, 7448 (2014)
2)Uncovering Two Competing Switching Mechanisms for Epitaxial and Ultra-Thin Strontium Titanate-based Resistive Switching Bits
M Kubicek, R Schmitt, F Messerschmitt, JLM Rupp
ACS Nano 9, 11, 10737 (2015)
3)Designing Strained Ionic Heterostructures for Resistive Swicthing Devices
S Schweiger, R Pfenninger, W Bowman, U Aschauer, JLM Rupp
Advanced Materials, in press (2016)
4) The Effect of Mechanical Twisting on Oxygen Ionic Transport in Solid State Energy Conversion Membranes
Y Shi, AH Bork, S Schweiger, JLM Rupp
Nature Materials, 14, 721 (2015)
5) A Micro-Dot Multilayer Oxide Device: Let’s Tune the Strain-Ionic Transport Interaction
S. Schweiger, M. Kubicek, F. Messerschmitt, C. Murer, J.L.M. Rupp
ACS Nano, 8, 5, 5032 (2014)
6) How does Moisture affect the Physical property of Memristance for Anionic-Electronic Resistive Switching Memories?
F Messerschmitt, M Kubicek, JLM Rupp
Advanced Functional Materials, 25, 32, 5117 (2015)
2:00 PM - EM07.03.02
Electronic Structure of Crystalline NbO2 from Molecular Beam Epitaxy
Matthew Wahila 1 , Marshall Tellekamp 2 , Zachary Lebens-Higgins 1 , Wei-Cheng Lee 1 , William Doolittle 2 , Louis Piper 1
1 , Binghamton University, Binghamton, New York, United States, 2 , Georgia Institute of Technology, Atlanta, Georgia, United States
Show AbstractNbO2 displays a thermally-induced semiconductor-to-metal transition making it attractive for applications within non-volatile memory devices,[1] and neuristor circuitry.[2] The underlying mechanism responsible for the switching within these devices is still not clear given the high temperature (1081K) of the transition and the use of electroforming. Moreover, the mechanism may be unique to mixed NbOx phases that are typically present within these devices that may be different to that of single-phase stoichiometric NbO2. Advances in the quality of NbO2 films grown by molecular beam epitaxy,[3] have begun enabling device architecture using single-phase highly crystalline NbO2 to address these issues. Like its sister compound, VO2, NbO2 also displays a Peierls distortion that accompanies the electronic phase transition but with weaker electron correlation effects. However, the ability to grow epitaxial NbO2 presents the opportunity to strain-engineer the “Mottness”, as recently demonstrated for VO2.[4,5]
Here, we report on our recent synchrotron-based HAXPES and O K-edge XAS studies of highly crystalline NbO2 films grown on sapphire by MBE. The higher photon energy of HAXPES compared to traditional XPS reduces the sensitivity to the over oxidized surface layer. Meanwhile, angular O K-edge XAS provides a means of studying the Nb-Nb dimers formed in the low temperature phase. Our results are compared to electronic structure calculations. We conclude that the phase transition of relaxed “bulk-like” NbO2 is driven by Peierls instability.
[1] IEEE Journal of the Electron Devices Society 4 (2016) 11-14
[2] Nature Materials 12, (2013) 114–117
[3] J. Cryst. Growth 463 (2017) 156-161
[4] Phys. Rev. B 94, (2016) 085105.
[5] Phys. Rev. B 93, 241110(R) (2016).
2:15 PM - EM07.03.03
Characterization of Seebeck Coefficient, Electrical Resistivity and Average Grain Size of Ge2Sb2Te5 Thin Films at High Temperatures
Lhacene Adnane 1 , Faruk Dirisaglik 2 , Kadir Cil 3 , Adam Cywar 1 , Yu Zhu 4 , Chung Lam 4 , Ali Gokirmak 1 , Helena Silva 1
1 , University of Connecticut , Storrs, Connecticut, United States, 2 Department of Electrical and Electronics Engineering, Eskisehir Osmangazi University, Eskisehir Turkey, 3 Department of Electrical and Electronics Engineering, Istanbul University, Istanbul Turkey, 4 , IBM T.J. Watson Research Center, Yorktown Heights, New York, United States
Show AbstractPhase change memory (PCM) devices utilize materials that can be rapidly and reversibly switched between high-resistivity amorphous and low-resistivity crystalline phases. Ge2Sb2Te5 (GST) is the most studied compound for PCM implementation. PCM devices are electrically switched [1] and experience high temperatures and significant thermal gradients. Hence, thermoelectric effects play a significant role in device operation. Seebeck coefficient (S), defined as the open-circuit voltage generated across a temperature difference in a material, enables determination of thermoelectric properties as well as the majority carrier type in the material. S-T characteristics change as the sample is annealed to a different crystalline state, along with the resistivity (ρ). Repeated annealing and cool-down cycles to and from increasingly higher temperatures allow for characterization of mixed-phase states and show consistent S-T and ρ-T behavior as the material crystallizes. ρ-T characteristics follow an Arrhenius behavior and S-T characteristics show linearly increasing S with temperature. Carrier activation energy and dS/dT show a linear correlation.
We will present simultaneously measured S-T and ρ-T characteristics up to 650 °C on GST thin films [2] along with average grain sizes obtained from XRD measurements [4]. The correlations between S-T, ρ-T, and the average grain size for GST will be discussed along with a percolation model [3] adopted to correlate the conductivity of the material with the crystalline ratio.
References
[1] Wong, H-S. Philip, Simone Raoux, SangBum Kim, Jiale Liang, John P. Reifenberg, Bipin Rajendran, Mehdi Asheghi, and Kenneth E. Goodson. "Phase change memory." Proceedings of the IEEE 98, no. 12 (2010): 2201-2227.
[2] Adnane, L., N. Williams, H. Silva, and A. Gokirmak. "High temperature setup for measurements of Seebeck coefficient and electrical resistivity of thin films using inductive heating." Review of Scientific Instruments 86, no. 10 (2015): 105119.
[3] Kim, Dae-Hwang, Florian Merget, Martin Laurenzis, Peter Haring Bolivar, and Heinrich Kurz. "Electrical percolation characteristics of Ge 2 Sb 2 Te 5 and Sn doped Ge 2 Sb 2 Te 5 thin films during the amorphous to crystalline phase transition." Journal of applied physics 97, no. 8 (2005): 083538.
[4] Cil, Kadir. "Temperature Dependent Characterization and Crystallization Dynamics of Ge2Sb2Te5 Thin Films and Nanoscale Structures." (2015).
2:30 PM - *EM07.03.04
Switching Kinetics of Memristors by Nanoscale Characterization and Their Applications in Neuromorphic Computing
Yuchao Yang 1
1 , Peking University, Beijing China
Show AbstractMemristive systems are intriguing candidates for brain-inspired computing and their properties stem from formation/dissolution of mysterious localized conduction channels. Here I will cover three topics regarding memristor research: 1) Understandings of the switching mechanism and device dynamics are fundamentally important for guiding future device developments. We have performed systematic TEM studies on metal filaments based memristive devices, including both ex situ and in situ observations, on both vertical and planar device structures, in different material systems, and at different dimensions. The results reveal rich information about the structure, composition and chemical state of the filaments, the filament geometry and growth directions, as well as fundamental electrochemical dynamics that govern the ionic transport and filament growth processes (Refs. 1-3). We also show evidence of oxygen ion migration and accumulation in HfO2 by in situ measurements of electrostatic force gradient between the probe and the sample, as systematically verified by the charge duration, oxygen gas eruption and controlled studies utilizing different electrolytes, field directions and environments. At higher voltages, oxygen–deficient nano-filaments are formed, as directly identified employing a CS-corrected transmission electron microscope (Ref. 4). 2) Based on these understandings, we engineered the analog switching linearity in TaOx based memristors by homogenizing the filament growth/dissolution rate via introduction of an ion diffusion limiting layer at the TiN/TaOx interface. Important synaptic learning rules in biological brains such as spike timing dependent plasticity was implemented using these optimized devices (Ref. 5). We experimentally demonstrated physically evolving networks in multi-terminal memristive devices and heterosynaptic plasticity was realized (Refs. 6-7). 3) The inherent variation in memristors has been regarded as a major obstacle to their practical applications in neuromorphic computing. We developed a fuzzy restricted Boltzmann machine network where all the weights states were fuzzified showing improved tolerance to device variations (Ref. 8). This study thus provides a new route toward highly robust neuromorphic computing.
References
[1] Y. Yang et al., Nature Commun. 5, 4232, 2014.
[2] Y. Yang et al., Nature Commun. 3, 732, 2012.
[3] Y. Yang et al., Nano Lett. 9, 1636, 2009.
[4] Y. Yang et al., Nature Commun. 8, 15173, 2017.
[5] Z. Wang et al., Nanoscale 8, 14015, 2016.
[6] Y. Yang et al., Adv. Mater. 27, 7720, 2015.
[7] Y. Yang et al., Adv. Electron. Mater. DOI: 10.1002/aelm.201700032, 2017.
[8] T. Zhang et al., Nano Futures 1, 015003, 2017.
EM07.04: Neuromorphic Device and Application I
Session Chairs
Monday PM, November 27, 2017
Hynes, Level 1, Room 110
3:30 PM - *EM07.04.01
Understanding Challenges and Opportunities for Transition Metal Oxide Based Reconfigurable Resistive Devices for Neuromorphic Computing
Rashmi Jha 1
1 Department of Electrical Engineering and Computing Systems, University of Cincinnati, Cincinnati, Ohio, United States
Show AbstractTransition Metal Oxide (TMO) based Resistive Random Access Memory (ReRAM) devices, both in digital and analog switching forms, have caught tremendous attention for their usage as artificial synapses in neuromorphic computing [1,2]. These types of devices offer immense opportunities to implement biologically-plausible learning algorithms [3,4]. However, despite significant research efforts in this area, there are numerous questions that need to be answered. For example, device models to explain the mechanism of reconfiguration in these devices,
considering extensive materials and electrochemical parameters of the metal-TMO-metal stack in ReRAM, needs to be developed further. To implement biologically-plausible learning algorithms, such as Spike Timing Dependent Plasticity (STDP), multiple resistive states or
continuous reconfiguration in resistances is desired [5,6]. However, relative stability and reliability of one resistive state over another need further understanding. Many researchers have reported frequency dependent short-term plasticity (STP) and transition from STP to long-term plasticity (LTP) in these devices [7]. However, brain-inspired algorithms that can exploit these subtle features of ReRAM devices are not widely studied. Interestingly, STP of synapses in biological brains has been linked to the brain’s ability to filter redundant data and develop a working memory, which plays an important role in cognitive decision making [8,9]. Therefore, observations of these transient features in ReRAM devices opens avenues for further studies. This paper reports our observations of STP and LTP in TMO based ReRAM devices and neuromorphic architectures where such features can be used for energy-efficient learning and decision making. Comprehensive device models will be presented based on electrochemical tests on these stacks to explain the mechanisms behind reconfiguration in ReRAM synaptic devices. Finally, data on variabilities in STP and LTP will be presented and modeled to understand their impact on various learning algorithms. Some other interesting applications, such as role of these reconfigurable devices and related architectures for mobile robot navigation and control in unsupervised fashion, will be discussed and supported with experimental results.
Acknowledgements: This work is supported by National Science Foundation under award No. 1556294.
References:
[1] Gokeman et. al., Front. Neurosci., Vol. 10, 2016.
[2] Burr et. al., Adv. Phys. X, Vol. 2, 2017.
[3] Zamarreño-Ramos et. al. Front. Neurosci, Vol.5, 2011.
[4] Bengio et. al., arXiv:1502.04156, 2015.
[5] Gao et. al., ACS Nano, Vol. 8, 2014.
[6] Jo et. al. , Nano Lett. , Vol. 10, 2010.
[7] Mandal. et. al., Sci. Rep., Vol. 4, 2014.
[8] Abbott et. al., Nature, Vol. 431, 2004.
[9] Deng et. al., Commun. Integr. Biol., Vol. 4, 2011.
4:00 PM - EM07.04.02
Reconfigurable Hardware-Intrinsic Security Primitives Based on Integrated Memristive Crossbars
Hussein Nili 1 , Gina Adam 2 , Mirko Prezioso 1 , Jeeson Kim 3 , Omid Kavehei 3 , Dmitri Strukov 1
1 , University of California, Santa Barbara, Santa Barbara, California, United States, 2 , National Institute for R&D in Microtechnologies, Bucharest Romania, 3 , Royal Melbourne Institute of Technology University, Melbourne, Victoria, Australia
Show AbstractThe exponential expansion of interconnected networks and devices and the sheer volume of personal and sensitive data transmitted over shared networks pose significant risks to information security. Hardware roots-of-trust cryptographic primitives have recently drawn increased interest as a potential solution. The physical unclonable function (PUF) class, are a relatively new breed of hardware-based cryptographic primitives that rely on inherent random variations in their fabrication process to generate “secret keys” as a one-way function. A PUF is physically embedded with its cryptographic “keys” via unique, random variations in its functional properties which are in effect unpredictable and inimitable.
Practical PUF primitives based on CMOS and CMOS-integration-compatible technologies are of special interest due to their immediate impact on, and versatile applications in information technologies. Many CMOS-based PUF architectures have been shown to be susceptible to tampering attacks, largely due to the limited space of accessible random properties and, in turn, the limited complexity of the PUF transfer function. Among the emergent technologies, nonvolatile memory crossbars based on resistive switching (ReRAM or memristive) devices are promising due to their small footprint, low-power operation and CMOS integration compatibility. The fabrication process induced variations in memristive crossbar arrays, manifested in switching threshold and nonlinear behavior variations, can be accessed relatively easily as random variations in device state and its I-V characteristics.
Here, we report on the implementation of PUF primitives based on two monolithically integrated 10×10 350-nm-line metal-oxide memristive crossbar circuits, as a basic building block prototype for robust, resilient and reconfigurable PUF architectures. Utilizing the variations in the analog state of memristors, along with the large variations in the nonlinear I-V characteristics, we experimentally demonstrate robust primitives with nearly ideal security metrics. The unpredictability of the PUF response is further confirmed through NIST statistical randomness test suite. Moreover, we demonstrate the near ideal re‑configurability of the analog crossbar circuits through readjustment of array conductance distribution, which allows for the realization of unique PUF instances based on the same crossbar circuit.
Finally, we propose and experimentally demonstrate the design and operation of a practical PUF architecture based on crossbar array building blocks. The robust performance of these primitives, their reconfigurability, and compatibility with back-end-of-line (BEOL) CMOS integration indicate their promise for practical, secure and resilient integrated security solutions.
4:15 PM - EM07.04.03
Noise-Driven Signal Transmitter Using Nonlinear Effect of Functional Oxides
Teruo Kanki 1 , Hidekazu Tanaka 1
1 , Osaka University, Osaka Japan
Show AbstractIn a typical situation, noise interferes with precise information transmission; however, in certain cases the addition of noise to a nonlinear system can improve the reliability of signal transmission. This phenomenon is well-known as stochastic resonance (SR). SR plays a crucial role in signal transduction in neuronal systems that are constantly exposed to ambient noise. In various technological areas, SR has generated interest because of the possibility of using it in sensing applications to detect weak signals and signal transmitter in a noisy environment. In physical terms, SR is considered to synchronize between a weak signal below a barrier of a bistable potential and transition nonlinearly between the two states assisted by noise. For this reason, oxides with a nonlinear resistive switch between semiconductor-metal transition are a promising material for SR utilization. Vanadium dioxide (VO2), in particular, shows the nonlinear transition by applying a bias voltage at room temperature, thus rendering the full potential to provide unusual signal transmitter according to SR principles [1]. Regarding measurement of SR properties in the VO2 thin film, the output response to a weak periodic signal was optimized by a particular level of noise, showing typical SR behavior in noise level dependence of the correlation coefficient between input and output signals. In analysis, the numerical SR simulation in a multi-network model suggests the existence of multiple metallic channels in VO2, spontaneously enhancing the reliability of signal transmission. Thus this self-generation of multichannels would be an exotic feature of VO2. In the future, SR devices using VO2 could be applied to parallel signal processing and might also have great potential as multisensing devices of various weak external signals such as temperature, light, pressure and various gases. [1] T. Kanki et al., Appl. Phys. Lett. 96, 242108 (2010)
4:30 PM - EM07.04.04
Utilizing Programming Variability in Phase Change Memory Cells for Security
Nafisa Noor 1 , Sadid Muneer 1 , Lhacene Adnane 1 , Raihan Sayeed Khan 1 , Anna Gorbenko 1 , Faruk Dirisaglik 3 , Adam Cywar 4 , Chung Lam 2 , Yu Zhu 2 , Ali Gokirmak 1 , Helena Silva 1
1 Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut, United States, 3 , Eskisehir Osmangazi University, Eskisehir Turkey, 4 , Analog Devices, Norwood, Massachusetts, United States, 2 , IBM T.J. Watson Research Center, Yorktown Heights, New York, United States
Show AbstractDevice-to-device variability, a major reliability concern for digital and analog circuits, is utilized in generating volatile and non-volatile secret keys in the field of hardware security systems implemented in physically unclonable functions (PUFs) [1]. The uncontrolled lithographic process variation in downscaled devices is the main source of variability in conventional CMOS based PUF devices [1]. Utilizing the inherent additional programming variability in phase change memory (PCM), small and light-weight PUF devices can potentially be produced with lower power requirement and long-term stability, due to non-volatility with high retention times, and re-programmable feature which results from high endurance of these devices [1]–[5].
The cell-to-cell reset variability has been demonstrated for Ge2Sb2Te5 line cells using two pulsing schemes. The first pulsing scheme consists of a single reset voltage pulse with intentionally chosen moderate amplitude which is not sufficient to fully amorphize the cell. Cells of very similar dimensions experiencing the same moderate reset pulse either pass or fail the reset test randomly and the distribution of pass/fail can be shifted by the pulse amplitude. The second pulsing scheme uses repeated voltage pulses with the same or gradually increasing amplitudes. This method accumulates the variability stemming from each pulsing step due to the partial reset and partial set variations, and eventually results in a wide spread of final resistances after a certain number of pulses. Device level measurements will be presented using various cell dimensions and possible physical mechanisms contributing to variability as well as different opportunities for security applications will be discussed.
References:
[1] Y. Gao, D. Ranasinghe, S. Al-Sarawi, and O. Kavehei, “Emerging physical unclonable functions with nanotechnology,” IEEE, 2016.
[2] K. Kursawe, A. Sadeghi, and D. Schellekens, “Reconfigurable physical unclonable functions-enabling technology for tamper-resistant storage,” Secur. Trust. …, 2009.
[3] L. Zhang, Z. Kong, and C. Chang, “PCKGen: A phase change memory based cryptographic key generator,” Circuits Syst. (ISCAS), 2013.
[4] L. Zhang, Z. Kong, and C. Chang, “Exploiting process variations and programming sensitivity of phase change memory for reconfigurable physical unclonable functions,” IEEE Trans., 2014.
[5] G. W. Burr, M. J. Breitwisch, M. Franceschini, D. Garetto, K. Gopalakrishnan, B. Jackson, B. Kurdi, C. Lam, L. A. Lastras, and A. Padilla, “Phase change memory technology,” J. Vac. Sci. Technol. B Microelectron. Nanom. Struct., vol. 28, p. 223, 2010.
4:45 PM - EM07.04.05
Investigation on Diffusing Dynamic of Ag in Chalcogenide Glass Material for Selector Application
Li Song 1 , Xinglong Ji 1 , Rong Zhao 1 , Shuai Zhong 1
1 , Singapore University of Technology and Design, Singapore Singapore
Show AbstractThe emerging non-volatile memory and memristor arrays with cross-point architecture, have shown huge potential for high density and 3-D integration. However, it faces a sneak path problem, which results in high power consumption leading to challenge for scaling up. A highly nonlinear thin-film selector is critically needed for large scale array implementation.[1] Till now, significant efforts have been devoted to searching for a thin-film selector which can satisfy diverse memristive elements with stringent matching criteria.[2] Various selector devices with different mechanisms have been proposed, including field assisted superlinear threshold selector[3], electrochemical metallization (EM) based selector, Ovonic threshold switch selector[4], Mixed-ionic-electronic-conduction selector[5] etc. Among these candidates, EM-based selector has been demonstrated with attractive switching performance, showing great potential as a universal selector. However, lacking effective observational evidence, a clear understanding of mechanism with direct capture of switching dynamics has not been achieved, limiting the further development of EM selector.
In this work, we designed and implemented a novel EM-based selector device using Ag alloyed chalcogenide glass (Ag-chal). Because of fast response speed under the action of electric field, Ag-chal has been widely applied as ionic or superionic solid electrolyte for memory, nano-battery, waveguide, and etc. Here we investigated its switching properties and demonstrated a selector with excellent electrical performance. Furthermore, we carefully studied the mechanism behind. A planar structure was designed for in-situ observing the switching dynamics of Ag-chal based selector. With solid in-situ observation evidences, we found that the origin of selective switching can be attributed to the fast migration and electrodeposition of Ag ion in chalcogenide glass. Combining the switching dynamics and current-voltage curve, we proposed a reliable switching model. The in-depth understanding of the switching mechanism in this work will provide a guideline to better design and establish high-performance selector devices for large scale memristor array integration.
[1] S. Kannan, J. Rajendran, R. Karri, O. Sinanoglu, in Proc. IEEE Int. Conf. VLSI Des., 2013, pp. 386–391.
[2] R. Aluguri, T.-Y. Tseng, IEEE J. Electron Devices Soc. 2016, 4, 294.
[3] S. H. Jo, T. Kumar, S. Narayanan, W. D. Lu, H. Nazarian, S. Clara, Electron Devices Meet. (IEDM), 2014 IEEE Int. 2014, 3.
[4] E. C. Sungho Kim, Young-Bae Kim, Kyung Min Kim, Sae-Jin Kim, Seung Ryul Lee, Man Chang, and I.-K. Y. Myoung-Jae Lee, Dongsoo Lee, Chang Jung Kim, U-In Chung, Vlsi 2013, 6, T240.
[5] R. S. Shenoy, G. W. Burr, K. Virwani, B. Jackson, A. Padilla, P. Narayanan, C. T. Rettner, R. M. Shelby, D. S. Bethune, K. V Raman, others, Semicond. Sci. Technol. 2014, 29, 104005.
EM07.05: Poster Session I
Session Chairs
Tuesday AM, November 28, 2017
Hynes, Level 1, Hall B
8:00 PM - EM07.05.02
Analog Synaptic Motion with Strong Potentiation, Depression and Short-Term to Long-Term Memory Transition in a Pt/CeO2/Pt Cross-Bar Array Structures
Hyung Jun Kim 1 , Paul Yang 1 , Daehoon Park 1 , Jong-Sung Park 1 , Chi Jung Kang 1 , Tae-Sik Yoon 1
1 , Myongji University, Yongin Korea (the Republic of)
Show AbstractArtificial synapses based on memristor device with resistance change emulating the biological synaptic behavior have been under active investigation for the application to highly energy efficient neuromorphic systems. Artificial synapses connected with neuron circuits having high connectivity allow the simultaneous parallel signal processing and consequently adaptive learning/memory functions with modulated synaptic weight. Particularly to emulate the analog modulation of synaptic weight, it is beneficial to utilize the analog resistive switching memristor. We have previously reported the analog resistive switching characteristics in a Pt/CeO2/Pt structure emulating biological synaptic behaviors. In the present study, we further demonstrated analog synaptic motions including short-term (STM) to long-term memory (LTM) transition in a cross-bar array structure, depending on the thickness of CeO2 layer in the range of 20-50 nm and pulse conditions such as amplitude, width, and number of pulsing, and time interval of pulsing. Besides the strong and reversible potentiation and depression motions with resistance change by two orders of magnitude, it shows the reliable STM-to-LTM transition in an analog fashion, corresponding the strengthening of memory, by reducing the thickness of CeO2 layer, increasing the amplitude, width, and number of pulse, and decreasing its interval similar to PPF(paired-pulse facilitation) and PTP(post-tetanic potentiation) operations. These results demonstrated the potential for the application to artificial synaptic devices with strong and reversible potentiation, depression, and memory transition characteristics of the Pt/CeO2/Pt cross-bar array structure for highly connected neuron-synapse network.
8:00 PM - EM07.05.03
Reversible and Analog Memcapacitance in ITO/HfOx/n-Si MOS Structure for Artificial Synaptic Devices
Daehoon Park 1 , Paul Yang 1 , Hyung Jun Kim 1 , Jong-Sung Park 1 , Chi Jung Kang 1 , Tae-Sik Yoon 1
1 , Myongji University, Yongin Korea (the Republic of)
Show AbstractThe memcapacitance featured as a memorized capacitance change for artificial synapse was investigated in a MOS capacitor structure of ITO/HfOx/n-Si. In contrast to the structure using inert Pt electrode, i.e. Pt/HfOx/n-Si, showing only little shift of flatband voltage, the ITO/HfOx/n-Si structure exhibited the analog and reversible memcapacitance depending on the polarity of applied biasing. As applying a negative voltage of -15 V to ITO electrode, the accumulation capacitance was increased from about 10.2 to 11.3 pF, implying the increased permittivity of HfOx from 14.8 to 16.3. On the other hand, applying a positive voltage decreased the capacitance gradually and also significantly, for example from 10 to 0.5 pF at +11 V. It is remarkable that the capacitance could be reversibly restored to 11 pF by applying -15 V. The significant change of capacitance is thought to be ascribed partially to the permittivity change due to the oxygen ion migration between ITO and HfOx. Since the ITO is a reactive electrode as to absorb the oxygen ions by applying the positive voltage and repel them by negative biasing, the oxygen content in HfOx was modulated accordingly. As a result, the permittivity of HfOx could be increased at –V and vice versa at +V. In addition, the consequent generation of defect states inside HfOx and interfaces would provide the charging sites as applying the voltages. Therefore, the substantial charging might alter the saturation and depletion characteristics in Si substrate, causing the dramatic change of capacitance. It is also noteworthy that the capacitance change was nonvolatile and analog as emulating the synaptic potentiation and depression motions, which has a potential for the Si-based synaptic devices employing reversible memcapacitor gate stack with ITO/HfOx/Si structure.
8:00 PM - EM07.05.04
Use of FIB Treatment on Multi-Layer Ultrathin 3x(WN/Al2O3) Stacks for Improved Consistency in Resistive Switching Devices
Zheng Jie Tan 1 , Nicholas Fang 1
1 , Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show AbstractResistive switching devices, or memristors, belong to a vast class of device which is driving active research in resistive random access memory (ReRAM) and neuromorphic circuits. However, a common issue with resistive switching devices is its cycle-to-cycle and device-to-device variability. We solve this problem by using FIB as a patterning tool and by the use of thin multilayer insulating stacks for resistive switching. FIB damages conventional Si-based devices, but aids resistive switching devices by generating a large density of useful mobile defects. We also use multiple ultrathin oxide layers in our devices for promoting switching consistency. These steps reduce the need for a violent electroforming process, reduces stochasticity of forming long filaments, thus improving both the device yields and consistency in switching behavior.
8:00 PM - EM07.05.05
Organic Thin-Film Transistors (OTFTs) - of Sensors and Artificial Neurons
Vanessa Tischler 1 , Daniel Tate 1 , Ehsan Danesh 1 , Sheida Faraji 1 , Jayawan Wijekoon 1 , Leszek Majewski 1 , Piotr Dudek 1 , Michael Turner 1
1 , University of Manchester, Manchester United Kingdom
Show Abstract Organic or plastic electronics offer an attractive alternative for electronic equipment ranging from flexible displays, OLEDs, radio-frequency identification tags (RFIDs), sensors to artificial neurons.
In contrast to traditional silicon technology, which requires manufacturing at elevated temperatures and clean-room environments, organic electronics can be entirely solution-processed. This enables the use of a variety of cheap production methods, starting from spin-coating for prototypes and leading up to roll-to-roll processing for large-area applications. Due to their lower processing temperatures, they can utilise plastic substrates like polyethylene naphthalene (PEN) or polyethylene terephthalate (PET), allowing for flexibility, light weight and low cost.
Recently organic field-effect transistors have attracted significant interest for applications in environmental sensors and neuromorphic computing due to the ability to fine-tune the properties of the organic semiconductor (OSC) and the device itself. While the OSC can be optimised chemically, the OFET has several parameters that can be manipulated to find the optimal parameters for a complex circuit.
Herein we present two types of versatile OFETs, one of which can be used in sensor arrays and the other one as individual components for neuromorphic computing applications. These p-type devices are fully solution processed and the only non-organic components are the electrodes, which are inkjet-printed utilising commercial silver inks. Furthermore, in contrast to many fully solution processed OFET structures reported in the literature, the reported devices operate at low voltages (under 3 V), offering minimal power consumption.
The transistors designated for sensing are manufactured in a bottom-Gate bottom-Contact (BGBC) structure and the selectivity can be increased by patterning several different OSCs in to one sensor array.
Utilising the same materials but in a top-Gate bottom-Contact (TGBC) structure allows increased electronical stability, which is needed in the complex circuits used in artificial neural networks. Furthermore, in the TGBC structure the OSC is automatically encapsulated so no signal-changes due to ambient conditions were observed over the duration of our measurements.
8:00 PM - EM07.05.06
Studies on Parasitic Current Leakage between Nearest Neighbor Electrodes of Cross-Point Arrayed Memristor Composed of BaTiO3 Bipolar-Type Resistive Switching Film
So Maejima 1 , Kaoru Yamashita 1 , Minoru Noda 1
1 , Kyoto Inst of Technology, Kyoto Japan
Show AbstractINTRODUCTION
Neuromorphic computing device and its technologies are required to evolve increasingly in order to develop a future society utilizing artificial intelligence. We have developed so far bipolar-type resistive switching of BaTiO3 (BT) film stacked capacitor cell for ReRAM operation with excellent ON/OFF ratio and memory endurance properties [1], which has reached 109 times recently. It was revealed that oxygen vacancies formed intentionally inside the film not only near the BT/electrode interface dominate the switching behavior. In this work, we have newly investigated the film for fabricating a cross-point arrayed memristor structure to make clear intrinsic problems for realizing a large-scale cross-point array as the neuron synaptic device.
EXPERIMENTAL
We prepared MOD-derived BT thin films (thickness:120 nm) containing oxygen vacancies on either Pt/Ti/SiO2/Si or MgO substrate. Au/Ti metal was deposited successively by RF sputtering, thereafter IDC upper electrodes were formed with various comb spacing. Finally, lateral current leakage was briefly evaluated.
RESULTS AND DISCUSSION
Lots of work have been reported on a single stacked oxide film capacitor structure for investigating ReRAM resistive switching performances. However, for an array structure, crosstalk phenomena; parasitic conductions become serious issue especially between nearest neighbor ones, other than those between two vertically located electrodes (interconnections).
The simplest case is to consider between two electrodes on the same lateral plane of the BT film.
In the comb-shaped electrodes test structure, the leakage current of the lateral direction was in the order of mA for 0.3 V per 1 and 100 mm in gap and width and larger by 3-4 order of magnitude than vertical one between the upper and lower electrodes (area: 200 mmf) with the same BT film.
Since oxygen vacancies was introduced near the surfaces of every BT sublayer when nitrogen annealing step for plural coated BT MOD solutions, where the oxygen vacancies were evaluated by XPS analyses, it is supposed that the vacancies are distributed laterally with homogeneous concentration. Therefore, we consider that the large lateral leakage is due to the laterally distributed oxygen vacancies, compared to the vertical current. Accordingly, when controlling the resistive change by motion of oxygen vacancies, it is possible for the cross-point memristor to become difficult to utilize a stacked structure of electrode/BT film prepared continuously on a whole area of electrodes. It is natural to consider that the resistive BT film at the cross-point should be surrounded and planarized by a different high-insulating film such as SiO2 or so, for we have measured a lateral leakage less than 1e-8 A on SiO2 with electrode gap and width of 1 and 100 mm.
[1] S. Maejima, M. Noda et al., MRS2016, EM10.2.06, Boston, MA US.
8:00 PM - EM07.05.07
A Macroscopic and Stochastic Simulation of Resistance Memory Switching
Kyunghwan Min 1 , Yongwoo Kwon 1
1 , Hongik University, Seoul Korea (the Republic of)
Show AbstractRRAM, which is one of the next generation memories, has attracted attention as an advantage of scaling-down, operation speed, power consumption and the like through a relatively simple MIM (Metal-Insulator-Metal) structure as compared with conventional memories. Recently, various models have been proposed to explain the behavior (forming, set, reset) of RRAM. The switching operation of RRAM is indicated by formation and destruction of conductive filament (CF). Understanding of these phenomena is based on metal ions and metal vacancies of metal oxides, oxygen ions and oxygen vacancies behaviors and electricity by voltage application, and thermal analysis by it. In addition, redox reaction of metal, analysis of the interface between dielectric and electrode are also required to interpret. However, the switching mechanism of RRAM set / reset through time dependent analysis for such phenomena has not been elucidated clearly. In this research, we focused on the electrical interpretation which is the main factor by simplifying the factor of CF electrostatic behavior. As the first step, we performed quasi-stationary simulation. We numerically calculated the change in the electric field in the oxide due to the presence of defect, which has a higher electrical conductivity and formulated the defect formation and CF formation. We have established a numerical model to analyze the current-voltage behavior accompanying the CF formation process. As a result, we analyzed the difference in electrical behavior according to the resistance ratio of LRS / HRS and the size of defect. Additionally, both activation energy necessary for formation of vacancy and bond polarization factor which is relevant to activation energy were also analyzed.
8:00 PM - EM07.05.08
A Model Study of Contacts Characteristics between Methylammonium Lead Iodide (CH3NH3PbI3) and Metal Electrode
Hayeon Shim 1 , Yongwoo Kwon 1
1 , Hongik University, Seoul Korea (the Republic of)
Show AbstractDRAM and NAND flash memory, which are currently in commercial use, require very complicated three-dimensional process technology for scaling-down in the future. On the other hand, since ReRAM is easy to be stacked in three-dimensional cross-point structure, it is now being actively studied in the world as a next-generation high-density nonvolatile memory device. In particular, organic-inorganic hybrid perovskite materials with excellent transport properties of electrons and holes have been found to be applicable as a ReRAM. Recently, a device utilizing CH3NH3PbI3 (MAPI) has been reported, and its operating voltage is very low as around 0.1V. This ReRAM has a lower switching voltage than conventional oxide-based ReRAM because of its weak bonding force between a cation and an anion. However, the study of its charge transport mechanism is still in the initial stage, and its contact characteristics with the metal electrode are not well known. Therefore, in this study, we analyzed the effects of the metal electrode contacts. First, we investigated the change of Fermi level energy according to the concentration of donor defect, and the concentration and energy level of deep trap through the model study of factors related the defects of MAPI. In addition to these defects, we analyzed the metal-insulator-metal (MIM) structure because there may be additional resistance components due to the contact properties with metal electrodes such as Schottky barrier or Fermi level pinning. As a result, we demonstrated that the resistance of the device is sensitively changed by the Schottky barrier height, and therefore, even if the resistance of the MAPI itself is the same, the resistance of the device may be different about 105 times depending on the metal electrode material.
8:00 PM - EM07.05.09
Fabrication of Protonic Ceramic Thin Film and Its Application for Controlling the Electrical Conductivity of ZnO
Shin Ho 1 , Jong-Sung Park 1
1 , Myong Ji University, Yong In Korea (the Republic of)
Show AbstractThe neuromorphic engineering has been actively studied in these days. The ion transport has an important role in communication of the signals through the nervous system called synapse. Zinc oxide (ZnO) is the n-type semiconductor and the n-type conductivity of ZnO is determined by the point defects such as oxygen vacancy, proton and zinc at interstitial site. The ZnO based materials such as Indium Gallium Zinc Oxide (IGZO) has been actively investigated for the channel in the transistor. Recently, in order to make the synaptic transistor, controlling the conductivity of the IGZO channel has been tried using the several ways.
In this work, in order to control the defect concentration in the IGZO, we tried to pump the proton into the IGZO through the protonic ceramics by applying the electric field. The proton pumping is more desirable than the oxygen vacancy pumping because the mobility of proton is much larger than that of the oxygen vacancy at room temperature. The protonic ceramics are the proton conducting oxide and has been actively investigated for the intermediate temperature fuel cell.
The sputtering target with the composition of The BaCe0.55Zr0.3Y0.15O3 which is one of the promising protonic ceramics was fabricated by solid state reaction. Thin films were deposited on dense substrate, Pt/SiO2, by RF magnetron sputter and their chemical composition and the crystal structure were investigated. The several fabrication parameters such as substrate temperatures, operating pressures for the deposition, calcination temperatures and the distance between the target and substrate were varied systemically to obtain the stoichiometric composition of thin film and it was found that the operating pressure had a crucial effects on the atomic ratio of barium in the BCZY thin film.
Finally, the IGZO thin film is fabricated on the protonic ceramic thin film and the changes in the electrical properties of IGZO thin film are measured after proton pumping into IGZO by applying the electric field. The results is discussed based on the defect chemistry including the proton.
Symposium Organizers
Seyoung Kim, IBM T.J. Watson Research Center
Barbara De Salvo, Leti, CED-TECH
Hyunsang Hwang, Pohang University of Science and Technology
Shimeng Yu, Arizona State University
Symposium Support
Journal of Applied Physics | AIP Publishing
EM07.06: Neuromorphic Device I—Neuron and Synapse
Session Chairs
Tuesday AM, November 28, 2017
Hynes, Level 1, Room 110
8:30 AM - *EM07.06.01
Diffusive Memristors as Artificial Synapses and Neurons for Neural Networks
Zhongrui Wang 1 , Saumil Joshi 1 , Can Li 1 , Yunning Li 1 , Mingyi Rao 1 , Rivu Midya 1 , Shiva Asapu 1 , Wenhao Song 1 , Qiangfei Xia 1 , J. Yang 1
1 Department of Electrical Engineering, University of Massachusetts Amherst, Amherst, Massachusetts, United States
Show AbstractIn the big data and IoT era, energy efficiency of computing has become an increasingly important and urgent topic. Human brain is known for being very efficient in energy consumption while traditional complementary metal–oxide–semiconductor devices and circuits are extremely inefficient in implementing brain-inspired computing paradigms1. Devices that behave more directly like synapses and neurons should enable a significantly more efficient implementation of a neural network. In order to more faithfully emulate (rather than just simulate) actual synapses and neurons, it is crucial for emerging devices to possess diffusive dynamics, which play critical roles in synaptic and neuronal functions. To emulate the fundamental dynamic process in electronic devices, we developed Ag-in-oxide diffusive memristors2 with a temporal response during and after stimulation similar to that of ion diffusion dynamics in the biosystems. The diffusive memristor and its dynamics enable a direct emulation of both short- and long-term plasticity of biological synapses and provide a viable solution for the crucial synaptic dynamics in neuromorphic computing3. In addition, combined with its intrinsic capacitance, a certain type of diffusive memristor has exhibited Leaky Integration and Fire (LFI) function, making it possible to achieve an artificial neuron using a single highly scalable and stackable emerging nanodevice4.
J. J. Yang, D. B. Strukov, and D. R. Stewart, "Memristive devices for computing," Nature Nanotech., vol. 8, pp. 13-24, 2013.
Rivu Midya, Zhongrui Wang, Jiaming Zhang, Sergey E. Savel’ev, Can Li, Mingyi Rao, et al., "Anatomy of Ag/Hafnia-Based Selectors with 1E10 Nonlinearity," Advanced Materials, vol. 29, pp.1604457, 2017.
Z. Wang, S. Joshi, S. E. Savel’ev, H. Jiang, R. Midya, P. Lin, et al., "Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing," Nature Materials, vol. 16, pp. 101-108, 2017.
S. Joshi, Z. Wang et al., unpublished, 2017.
9:00 AM - EM07.06.02
Towards a Leaky Integrate and Fire Mott Artificial Neuron Made on Chip
Coline Adda 2 3 , Pablo Stoliar 3 , Julien Tranchant 1 , Benoit Corraze 1 , Marie-Paule Besland 1 , Marcelo Rozenberg 4 , Ralph Gay 3 , Luis Hueso 3 , Etienne Janod 1 , Laurent Cario 1
2 , Institut des Matériaux Jean Rouxel, Nantes France, 3 , CIC nanoGUNE, San Sebastian Spain, 1 , Institut des Matériaux Jean Rouxel, Nantes France, 4 , LPS, CNRS-UMR 8502, Orsay France
Show AbstractDuring the last half-century, we witnessed a revolution of information technology due to the development of computers based on Von Neumann architecture. Despite decades of intense development and their remarkable efficiency for ultra-fast calculations, Von Neumann computers are still outperformed by the mammal brain in some data processing applications, such as data mining or pattern recognition with low energy cost. Mimicking the brain architecture by artificial networks is hence the challenge faced by neuromorphic computing. However the implementation of artificial neural network directly in hardware requires the development of both artificial neurons and synapses. While artificial synapses might be obtained thanks to single components called memristors, artificial neurons have been implemented so far mainly with complex silicon-based circuits.
We recently showed that Leaky Integrate and Fire (LIF) artificial neuron single-component could be realized using Mott insulators crystals [1]. Indeed, under electrical field, this broad class of compounds displays a time-delayed volatile resistance drop [2]–[5]. This volatile resistive switching results from the appearance of metallic domains, whose dynamics of creation and destruction is analogous to the transfer function used to describe the LIF neuron behavior. Under electric field the fraction of metallic domains increases up to a critical threshold, above which a metallic filamentary path is created within the sample. This induces a volatile resistive switching and a burst of current into the circuit called firing event.
We show here that the LIF artificial neuron behaviour already found on Mott insulators crystals can be now implemented on patterned Mott insulators and sputtered thin films [6]. These results show that the downscaling of LIF artificial Mott neuron single component is now possible, paving the way to Mott LIF artificial neuron on chip compatible with microelectronics.
References:
[1] P. Stoliar et al., « A Leaky-Integrate-and-Fire Neuron Analog Realized with a Mott Insulator », Adv. Funct. Mater., p. 1604740, janv. 2017.
[2] V. Guiot et al., « Avalanche breakdown in GaTa4Se8−xTex narrow-gap Mott insulators », Nat. Commun., vol. 4, p. 1722, avr. 2013.
[3] E. Janod et al., « Resistive Switching in Mott Insulators and Correlated Systems », Adv. Funct. Mater., vol. 25, no 40, p. 6287-6305, oct. 2015.
[4] P. Stoliar et al., « Universal Electric-Field-Driven Resistive Transition in Narrow-Gap Mott Insulators », Adv. Mater., vol. 25, no 23, p. 3222-3226, 2013.
[5] P. Stoliar, M. Rozenberg, E. Janod, B. Corraze, J. Tranchant, et L. Cario, « Nonthermal and purely electronic resistive switching in a Mott memory », Phys. Rev. B, vol. 90, no 4, p. 045146, juill. 2014.
[6] C. Adda et al., « An Artificial Neuron Founded on Resistive Switching of Mott Insulators », in 2017 IEEE International Memory Workshop (IMW), 2017, DOI: 10.1109/IMW.2017.7939071
9:15 AM - EM07.06.03
Application of VO2 Metal-Insulator Transition to Capacitor-Less Neuron Circuits
Takeaki Yajima 1 , Tomonori Nishimura 1 , Akira Toriumi 1
1 , University of Tokyo, Tokyo Japan
Show AbstractThe neuromorphic circuit mimicking the neuronal circuits is one of the promising candidates for next-generation integrated circuits due to its highly parallel architecture with respect to the conventional circuits. Just like neuronal circuits, the neuromorphic circuit consists of local neuron circuits, which average the input voltage pulses, and if the average exceeds the threshold, generate an output voltage pulse. This time-averaging function is usually achieved by charging and discharging capacitors in the time scale given by the RC constant [1]. However, using capacitors inevitably leads to a formidable challenge in downscaling. In this study, the time-averaging neuron function is implemented by the VO2 metal-insulator transition, resulting in a capacitor-less neuron circuit and overcoming the challenges of downscaling. The time averaging function of VO2 originates from the slow Joule heat dissipation in the device, which enables heat integral in analogy with charge integral in capacitors. The integrated heat is converted to the VO2 temperature, and induces a phase transition from the insulating state to the metallic state above the transition temperature [2,3]. The similar strategy can also be applied to other phase transitions and neuromorphic circuits, implying the novel opportunity for the functional materials in the field of neuromorphic electronics. This work was supported by JST CREST Grant Number JPMJCR14F2, Japan, and was partially supported by JSPS KAKENHI 17H04812.
[1] G. Indiveri, Frontiers Neurosci. 5, 73 (2011).
[2] Z. Yang et al., Annu. Rev. Mater. Res. 41, 337 (2011).
[3] T. Yajima et al., IEDM (2016).
9:30 AM - *EM07.06.04
Brain-Inspired Computing with Resistive Memories
Giacomo Pedretti 1 , Valerio Milo 1 , Mario Laudato 1 , Roberto Carboni 1 , Stefano Bianchi 1 , Elia Ambrosi 1 , Alessandro Bricalli 1 , Wei Wang 1 , Zhong Sun 1 , Daniele Ielmini 1
1 Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milano Italy
Show AbstractComputing with resistive memories, or memristors, is currently gaining momentum as one of the most promising approaches to address the big data challenge. In fact, memristors can both store data and compute with them, thus allowing to break the barrier between memory and processing units which limits von Neumann computers. The strong potential of memristive computing has triggered intense research efforts toward memory-based deep learning, where resistive switching or phase change devices are used as analog synaptic elements to be trained by backpropagation schemes. However, resistive switching devices have strong limitations in both write speed (around 100 ns) and weight-update linearity, thus having difficult chances in competing with conventional graphical processing units (GPUs) in training deep neural network for big data problems and advanced intelligent systems, such as driverless cars. On the other hand, brain-inspired computing machines may take advantage of the capability for physical computing, where spiking signals are processed within the material itself thanks to the inherent migration and phase change processes at the atomic and nanometer scales.
This work provides an overview of current approaches to brain-inspired neuromorphic computing using resistive memories, including resistive switching memory (RRAM) and phase change memory (PCM). Synaptic plasticity processes in memristive synapses will be presented, including spike timing dependent plasticity (STDP) and spike rate dependent plasticity (SRDP) for unsupervised training. Learning of patterns with memristive synapses will be demonstrated by showing experiments on a neuromorphic hardware with bipolar HfOx RRAM as electronic synapses. Stochastic learning algorithms and the impact of noise on learning efficiency will be studied with the aid of both experimental data on neuromorphic hardware and model-based simulations, enabling a physics-based design of future brain-inspired computers. Advanced functions, such as online learning/forgetting, memristive-based neurons, winner-take-all networks, and associative memories, all of them benefitting from physical computing by the nanoscale memristive switching processes, will be discussed.
EM07.07: Memristive Switching and Its Characterization for Brain-Inspired Computing
Session Chairs
Tuesday PM, November 28, 2017
Hynes, Level 1, Room 110
10:30 AM - *EM07.07.01
Fundamental Ingredients of Redox-Based Memristive Switching in Metal Oxides
Rainer Waser 1 , Felix Gunkel 2 , Regina Dittmann 1 , Vikas Rana 1 , Dirk Wouters 2 , Ilia Valov 1 , Stephan Menzel 1
1 , Forschungszentrum Juelich, Juelich Germany, 2 , RWTH Aachen University, Aachen Germany
Show AbstractRedox-Based Resistive Switching Memories (ReRAM), also called nanoionic memories or memristive elements, are widely considered to provide a potential leap beyond the limits of Flash (with respect to write speed, write energies) and DRAM (with respect to scalability, retention times) as well as energy-efficient approaches to neuromorphic concepts.
In this talk, fundamental aspects of the physics and chemistry (lattice disorder, ionic and electronic transport processes, and phase formation) of these elements will be presented. In particular, the ultra-high non-linearity of the switching kinetics of redox-based resistive switching devices will be discussed with an emphasis on the so-called valence change mechanism (VCM) typically encountered as a bipolar switching in metal oxides. The involved electrochemical and physical processes can be either electric field/voltage enhanced or accelerated by a local increase in temperature due to Joule heating. The analysis of the published SET switching kinetics data of VCM-type ReRAM systems showed that their nonlinearity is mainly dominated by temperature-accelerated ion hopping, controlled by the local power during the switching process. The gradual RESET transition can be explained in terms of temperature-accelerated ion movement with counter-acting ion drift and diffusion processes. It will be shown that a designated combination of oxides can significantly improve the long-term kinetics, i.e. the retention time, by tailoring the ion diffusion properties in the oxide layers. The relevance of these aspects for neuromorphic applications will be worked out.
11:00 AM - EM07.07.02
Evaluation of Gradual Set and Reset Phenomena in Nanometer-sized HfO2/TiO2 Bilayer Resistive Switching Structures for Synaptic Device Application
Alexander Hardtdegen 1 , Moritz von Witzleben 2 , Ulrich Boettger 2 , Stephan Menzel 1 , Dirk Wouters 2 , Susanne Hoffmann-Eifert 1
1 Peter Grünberg Institute, Forschungszentrum Jülich GmbH, Jülich Germany, 2 Institut für Werkstoffe der Elektrotechnik II, RWTH Aachen University, Aachen Germany
Show AbstractBrain-inspired, spike based neuronal networks for unsupervised learning have gained a lot of interest because of their ability to learn more efficiently than other comparable systems. The neuronal networks are based on CMOS technology, whereas for the connecting synapses, resistive random access memory (ReRAM) cells are promising candidates. Due to the high number of synapses necessary for a neural network, highly scalable, CMOS compatible, energy efficient, analog switching ReRAM cells are required. The weighting of the input signal affords variable programmable resistance states. Therefore, an important requirement for the integration of ReRAM cells in synaptic devices is analog switching with gradual resistance variation, which means a gradual set and reset behavior.
In earlier studies, we investigated the switching behavior of nano-crossbar devices of about 100 nm x 100 nm in size built from CMOS compatible, atomic layer deposited (ALD) 3 nm HfO2-films sandwiched between Pt and Hf/Pt electrodes, respectively. Monolayer HfO2-cells reveal an abrupt set behavior with a significant variability in the set voltage whereas the reset process is gradual. This set behavior, which is consistent with other studies, is not useful for synaptic application. In contrast, ALD grown, 3 nm HfO2 / 3 nm TiO2 bilayer structures, sandwiched between Pt and Ti/Pt electrodes, exhibit a clear gradual set behavior, which is necessary for synaptic applications. Set and reset processes occur at reasonable low voltages of ± 0.5 V, with ON and OFF-states of 3 kΩ and 150 kΩ, respectively, for a compliance current of 100 µA. In addition, the reset behavior turns out to be gradual in the low power regime whereas it changes into an abrupt reset behavior for higher reset-voltage amplitudes.
In this presentation we are going to discuss the advantages and limitations for the use of Pt/HfO2/TiO2/Ti/Pt nano-crossbar structures in synaptic devices. For this purpose, set and reset kinetic measurements will be compared to neuromorphic pulse train programming behavior.
11:15 AM - EM07.07.03
Learning Dynamics of Spiking Neuromorphic Networks Employing HfO2-Based RRAMs
Stefano Brivio 1 , Daniele Conti 2 , Jacopo Frascaroli 1 , Erika Covi 1 , Manu Nair 3 , Carlo Ricciardi 2 , Giacomo Indiveri 3 , Sabina Spiga 1
1 , Laboratorio MDM, IMM - CNR, Agrate Brianza Italy, 2 Department of Applied Science and Technology (DISAT), Politecnico di Torino, Torino Italy, 3 Institute of Neuroinformatics, University of Zürich and ETH Zürich, Zürich Switzerland
Show AbstractThe recent rapid raise of unstructured digital data volume has been cornering the conventional von Neumann computing architecture based on physical and functional separation of memory and computing units. Indeed, it is known that a large amount of computing power consumption is ascribed to data transfer between memory chips and processors. A drastic point of disruption is the realization of architectures featuring co-located memory and computing elements and operating in a bio-inspired manner. The enduring obstacle to hardware realization of spiking neuromorphic networks still remains the availability of directly accessible, non-volatile, low power and devices with plastic operation playing the role of a synaptic matrix emulating the reconfigurable connectivity among neurons. Resistance switching devices, originally known as resistive random access memories (RRAMs) and recently baptized also memristors or memristive systems, has been recognized as the right tool for neuromorphic computation.
In the present work, first of all, we investigate the electric response of HfO2-based RRAMs[1-2] and identify the region in the space of the parameters of the input stimulation (voltage and time width of the pulses) useful for plastic, i.e. a state dependent, operation. Furthermore, we model the plastic behavior of the RRAM devices and its variability in order to perform system level simulations of a spiking neuromorphic network that employs a generalized spike timing dependent plasticity (STPD) rule.[3] Such rule extends the nearest neighbor pair pulse STDP usually employed in memristive neural networks in order to retrieve the biologically and computationally relevant dependence on the firing rate.[4-5] Furthermore, it has already been proved by some of the authors that the neuronal part of the simulated network can be efficiently fabricated in conventional CMOS technology[6-7].
Through the simulation, we analyze the learning dynamics of the network as well as its performance against the standard MNIST dataset. In particular, we tested the slow learning – slow forgetting dynamics, which is crucial for robust retentions of memories into network configurations when synaptic weights are bounded or have limited precision, as it is unavoidable for real hardware devices.
In summary, the work proposes a novel contribution in the simulation of specific operation of RRAM devices on the base of an extensive experimental characterization and in the analysis of network dynamics which provide a route for network optimization.
[1] Brivio et al. Appl. Phys. Lett. 107 023504 (2015)
[2] Brivio et al. Appl. Phys. Lett. 109 133504 (2016)
[3] Brader et al. Neural Comp. 19 2881 (2007)
[4] Sjöström et al Neuron 32 1149 (2001)
[5] Pfister et al. Adv. Neural Inform. Proc. Syst. 18 1083 (2006)
[6] Mostafa et al. Front. Neurosci. 9 1 (2015)
[7] Mostafa et al. ISCAS 926 (2016)
11:30 AM - EM07.07.04
Simulations of Reset Operation of Phase Change Memory Devices Based on Semiconductor Physics including the Generation-Transport-Recombination (GTR) of Minority Carriers
Sadid Muneer 1 , Helena Silva 1 , Ali Gokirmak 1
1 Department of Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut, United States
Show AbstractFinite element electrothermal modeling of PCM devices is a strong tool to gain insight over the underlying electrical and thermal phenomena that occur during device operation and to design improved devices [1]–[5]. In these simulation models, current continuity is assumed and calculation of local charge is not performed. On the other hand, modeling of PCM devices using semiconductor physics has also been performed [6]–[8], where a simplified band structure is used and threshold switching is modeled using impact ionization theory. The thermoelectric transport (Thomson and Peltier effects) that becomes important in the presence of extreme thermal gradients (~> 1 K/m) [9] is usually not included in these models. The effect of high carrier generation during melting, expected to lead to carrier concentration ~3 x 1021 cm-3 in liquid Ge2Sb2Te5, is also not accounted for.
In this work, we present a finite element simulation framework for phase change memory devices that uses semiconductor device physics models including thermoelectric transport. The model solves continuity equations for electrons and holes and computes the local potential distribution using Poisson’s equation. Different generation-recombination mechanisms (SRH, Auger etc.) and temperature dependent semiconductor parameters are used. The thermoelectric effect arising from the generation-transport-recombination of minority carriers and the electronic convective heat generated by the charge carriers are included in the heat equation. The reset simulation results will be discussed, including polarity dependence, and compared to results from other models. This device physics model can be integrated with our nucleation, growth and amorphization based crystal density model [10] to better understand the role of charge trapping on the long-term resistance drift phenomenon in PCM devices.
References
[1] J. Reifenberg, et al., ITHERM’06, pp. 106-113, 2006.
[2] S. Braga, et al., ESSDERC’08, pp. 154-157, 2008.
[3] A. Faraclas, et al., Electron Devices, IEEE Trans., vol. 61, no. 2, pp. 372–378, Feb. 2014.
[4] N. Ciocchini, et al., IEEE Trans. Electron Devices, vol. 62, no. 10, pp. 3264–3271, Oct. 2015.
[5] A. Athmanathan, et al., SISPAD’15, pp. 289-292, 2015.
[6] A. Pirovano, et al., Electron Devices, IEEE Trans., vol. 51, no. 3, pp. 452–459, 2004.
[7] A. Redaelli, et al., J. Appl., 103(11):6, Jun 1, 2008.
[8] F. Giovanardi, PhD diss., alma, 2013.
[9] G. Bakan, et al., Sci. Rep., vol. 3, no. 5, p. 2724, 2013.
[10] Z. Woods, et al., IEEE Trans. Elec. Dev. (currently under Rev.), 2017.
EM07.08: Neuromorphic System and Algorithm
Session Chairs
Seyoung Kim
Shriram Ramanathan
Tuesday PM, November 28, 2017
Hynes, Level 1, Room 110
1:30 PM - *EM07.08.01
Resistive Memories for Spike-Based Neuromorphic Circuits
Elisa Vianello 1
1 , CEA Leti, Grenoble France
Show AbstractIn the last decade machine learning algorithms have demonstrated to be superior candidates for the detection and prediction of patterns occurring in complex data, for example in image or speech recognition. Despite these advances, there are still some deficits. First, these algorithms require significant memory access thus ruling out an implementation using standard platforms (e.g. GPUs, FPGAs) for embedded applications. Second, most machine leaning algorithms need to be trained with huge data sets (supervised learning). Resistive memories (RRAM) have demonstrated to be a promising candidate to overcome both these constrains. RRAM arrays can act as a dot product accelerator, which is one of the main building blocks in neuromorphic computing systems. This approach could provide improvements in power and speed with respect to the GPU-based networks. In this work we present a possible hardware implementation of spike-based Convolutional Neural Network for visual pattern recognition [1]. Thanks to the use of RRAM synapses to implement the kernel, the convolution operations are performed directly in memory, allowing to reduce the latency per image recognition with respect to software implementations on CPU or GPU. Moreover RRAM devices are promising candidates to emulate synaptic plasticity, the capability of synapses to enhance or diminish their connectivity between neurons, which is the basis for learning and memory in the brain. Neural systems exhibit various types of plasticity. In this work we proposed an architecture that implements both Spike-Timing-Dependent Plasticity (STDP) (a type of Long Term plasticity) and Synaptic Adaptation (a type of Short Term Plasticity). We show the benefits of utilizing both kinds of plasticity on a real application, visual pattern extraction in real time. Long Term STDP allows the neural network to learn patterns without training data set, and Short Term Synaptic Adaptation makes the learning process very robust against environmental noise [2, 3].
[1] D. Garbin; O. Bichler; E. Vianello; Q. Rafhay; C. Gamrat; L. Perniola; G. Ghibaudo; B. DeSalvo, “Variability-tolerant Convolutional Neural Network for Pattern Recognition applications based on OxRAM synapses”, IEDM Technical Digest, p.28.4, 2014.
[2] T. Werner, E. Vianello, O. Bichler, A. Grossi, E. Nowak, J. -F. Nodin, B. Yvert, B. De Salvo, L. Perniola “Experimental demonstration of short and long term synaptic plasticity using OxRAM multi k-bit arrays for reliable detection in highly noisy input data”, IEDM Technical Digest, p. 16.6, 2016.
[3] E. Vianello, T. Werner, O. Bichler, A. Valentian, G. Molas, B. Yvert, B. De Salvo, L. Perniola “Resistive memories for spike-based neuromorphic circuits” IMW 2017.
2:00 PM - EM07.08.02
Device Array Specifications for Training Convolutional Neural Networks
Murat Onen 1 , Tayfun Gokmen 1 , Wilfried Haensch 1
1 , IBM T.J. Watson Research Center, Yorktown Heights, New York, United States
Show AbstractIn a recent publication we described the concept of resistive processing unit (RPU) devices that can used to train deep neural networks consisting of fully connected layers. Here, we extend this concept towards convolutional neural networks (CNNs). We show how to map the convolutional layers to RPU arrays to efficiently utilize the hardware in all three cycles of the backpropagation algorithm. Noise and bound limitations, inherent to the analog nature of the computations performed on the arrays, are analyzed and powerful management techniques are provided to mitigate these problems without introducing additional complexity. Furthermore, we also describe an update management scheme that conditions the numbers in the digital domain so that the effect of device variations can be mitigated. We show that combination of all those techniques enables a successful application of the RPU concept for training CNNs; and the list of RPU device specifications that are derived from a fully connected network also applies to CNNs. The techniques discussed here are more general and can be used beyond CNNs and therefore enables applicability of RPU approach for large class of neural network architectures.
2:15 PM - EM07.08.03
Nitride Based Memristor Mimicking Synaptic Plasticity
Fei Zeng 1 , Qin Wan 1
1 , Tsinghua University, Beijing China
Show AbstractRecent years, plenty of woks endeavored to mimic synaptic plasticity by using memristors to realize neuromorphic computing and learning. However, most of them, esecially oxide, suffer the influence of oxygen, water and carbon dioxide in ambient enviroment. The parasite chemical cells modify or overlap the intrinsic properties of memristors significantly. Thus, we consider to find nitride based memristor system, which could be sealed in the controlled N2 enviroment, according to the practical requirment of CMOS compability. We fabricated AlN, Nb-doped AlN thin films as memristor layer and tested their electrical properties in the N2-filled glove box. The structure characterizations revealed that the films were not well crystallized. The vacancy and the doped Nb atoms were main defects. The devices with simple structure of (Pd/AlN/Pd) were fabricated and their direct current-voltage (I-V) properties were tested. The I-V curves demonstrated that the device is bipolar becuase its conductance increased with the sweeping times in the one bias polar but decreased in the other polar. Two important learning protocols, spike-rate-dependent plasticity (SRDP) and spike-timing-dependent plasticity (STDP) were realzied with very low power consumption in the level of pJ for individual spike. The N vacancy and extended electrons cloud contributed by Nb doping were accounted for the fromation of conductive passages. These mechanisms would be modulated by the films stress and lattice mismatch. Our work suggests a feasible memristor system compatible to the nitride compounds and electronics.
2:30 PM - *EM07.08.04
Machine Learning Powered by Nonvolatile Memory—Greedy Edge-Wise Training of Crossbar Array
Doo Seok Jeong 1
1 , KIST, Seoul Korea (the Republic of)
Show AbstractIn spite of remarkable progress in machine learning techniques that offer solutions to various classes of problems, the state-of-the-art machine learning algorithm such as the backpropagation often keeps machines from real-time learning (online learning) due in part to computational complexity in parameter optimization. As an alternative, I propose a learning algorithm that renders it possible to train a memory in real time—it is termed as the Markov chain Hebbian learning (MCHL) algorithm. The algorithm pursues efficiency in memory use during training in that (i) the weight matrix has ternary elements (-1, 0, 1) and (ii) each update follows a Markov chain. The former allows two bits of memory for each weight element such that the memory use can be minimized. The algorithm was verified by two proof-of-concept tasks (handwritten digit recognition and multiplication table memorization) in which numbers were taken as symbols; particularly, the latter bases multiplication arithmetic on memory, and thus perception, perhaps analogous to humans’ mental arithmetic. The memory-based multiplication arithmetic successfully offers the basis of factorization. After all, the MCHL algorithm supports novel insight into the arithmetic in that the arithmetic is viewed as memory-based perception.
EM07.09: Neuromorphic Device II—Resistive Memory-Based Synapse
Session Chairs
Doo Seok Jeong
Elisa Vianello
Tuesday PM, November 28, 2017
Hynes, Level 1, Room 110
3:30 PM - *EM07.09.01
Organismic Materials and Intelligence
Shriram Ramanathan 1
1 , Purdue University, West Lafayette, Indiana, United States
Show AbstractCo-operation and conflict are essential to survival, evolution and adaptation of species. I will discuss a few examples from animal colonies discussing specific collective behavioral patterns as noted in field observations by biologists. I will then illustrate how evolutionary features driving the natural world can be adapted to designing organoids that mimic the brain and in a broader context artificial life. I will outline a vision for a new branch of enquiry termed organismic materials using complex oxide semiconductors as model systems that display emergent electronic phases from quantum mechanical effects as well as unprecedented plasticity. The studies pave the way for use of new materials in design of neuromorphic computing, artificial intelligence and motivate scholarship in metastable adaptive materials. Collaborators and funding will be acknowledged in the presentation.
4:00 PM - EM07.09.02
The Resistive Switching Characteristics of Nanocrystalline HfO2 Films Grown by Fast Atomic Layer Deposition with La(NO3)36H2O Solution Oxidant.
Yong Chan Jung 1 , Sejong Seong 1 , Taehoon Lee 1 , Seon Yong Kim 1 , In-Sung Park 1 , Jinho Ahn 1
1 , Hanyang University, Seoul Korea (the Republic of)
Show AbstractHafnium oxide (HfO2) is a promising material which already used in complementary metal oxide semiconductor device as a high-κ dielectric layer. For the resistive switching device application, HfO2 exhibits both unipolar and bipolar switching, and has an advantage for a large resistance ratio between low resistance state (LRS) and high resistance state (HRS) with a large band gap energy (5.9±0.5 eV). Therefore, various researches on fabricating a resistive switching device using HfO2 as an insulator have been conducted. Generally, the deposition method of the insulator material can be affected to device property.
Atomic layer deposition (ALD) is an innovative thin film producing method that has been applied in various nano-device fabrications. To fabricate metal-oxide films using ALD, the choice of oxidant is important due to the oxidant can change the characteristics of the deposited films such as the crystalline structure, growth rate, and electrical property. It is reported that La-based oxidants in ALD process can influence the crystalline, morphological properties and the growth rate of ZrO2 films [1].
In this study, nanocrystalline HfO2 films were deposited by ALD using Hf[N(CH3)C2H5]4 as the metal precursor and La(NO3)36H2O solution at concentration of 40% as the oxidant. Specifically, the HfO2 film prepared using La(NO3)36H2O solution was nanocrystallized and the growth rate was about 1.8 Å/cycle, whereas that prepared using H2O oxidant was amorphous and the growth rate was 0.7 Å/cycle. It is well known that grain boundaries act as preferential paths for atomic diffusion, leakage current and dielectric breakdown, therefore the nanocrystallization of HfO2 with La(NO3)36H2O solution oxidant could be a problem of the device electrical properties although the film deposition rate is fast.
To further understand the impact of using La(NO3)36H2O solution oxidant for resistive switching characteristics, metal-insulator-metal structures consisting of Ru (100 nm)/HfO2 (10 nm)/Ru (100nm) were fabricated. In both HfO2 films, the crystal structure and chemical state were determined by X-ray diffraction and X-ray photoelectron spectroscopy, respectively. The thickness and composition were confirmed using spectroscopic ellipsometry and high-resolution transmission electron microscopy. Electrical characterization was measured using keithley 4200-SCS semiconductor parameter analyzer.
As a result, the resistive switching characteristic was degraded for HfO2 prepared by La(NO3)36H2O solution oxidant. This degradation was recognized by dispersion of switching parameters such as the forming voltage, the set voltage and reset current. The result suggests that it is more advatageous to fabricate resistive switching device with amorphous HfO2 film than nanocrystalline HfO2 film in terms of device uniformity.
[1] N.K. Oh, J.-T. Kim, G. Kang, J.-K. An, M. Nam, S.Y. Kim, I.-S. Park and J.-Y. Yun, Appl. Surf. Sci. 394 (2017) 231-239
4:15 PM - EM07.09.03
Finite Element Modeling of Phase Change Memory Devices—Electro-Thermal Effects and Crystallization-Amorphization Dynamics
Zachary Woods 1 , Jake Scoggin 1 , Adam Cywar 1 , Helena Silva 1 , Ali Gokirmak 1
1 Electrical and Computer Engineering, University of Connecticut, Storrs, Connecticut, United States
Show AbstractPhase change memory (PCM) devices take advantage of the large resistance contrast between crystalline and amorphous phases of phase change materials. The operation of PCM devices relies on stochastic nucleation and growth of crystal grains to achieve the low resistance set state, and melt-quench to reach the high resistance amorphous state. These processes are thermally driven via Joule and thermoelectric heating in PCM devices; thus a fully comprehensive electro-thermal model coupled with crystallization and amorphization physics is necessary to accurately simulate PCM device operation.
We have developed a finite element model of the dynamic crystallization and amorphization process using a simple rate equation. The model uses an empirical approach to capture classical nucleation and growth theory by tracking the local crystallinity with a stochastic nucleation function and gradient driven growth at grain boundaries with temperature dependent nucleation probabilities and growth velocities [1]. Temperature, electric field and phase dependent material properties enable the construction of a fully coupled model allowing for self-consistent solutions of Joule heating, Peltier heating and cooling at interfaces, and Thomson heating in bulk [2], as well as crystallization, melting and amorphization [3]. The model includes latent heat of fusion at the solid-liquid transition and heat of crystallization at the amorphous-crystalline transition [3]. Electronic transport through grain boundaries is handled with a carrier activation energy model [3].
Our model allows for simulation of the “snapback” phenomenon as amorphous material breaks down at the threshold voltage and becomes more conductive, as well as percolation path formation as the material locally heats and crystallizes. The stochastic nucleation and grain boundary resistance physics allow for the simulation of cycle-to-cycle variation. The model can capture the nucleation and growth of crystal grains in amorphous material at the end of the reset pulse. Using long fall-times, it is possible to nucleate crystal grains in the melt-quenched amorphous region to reduce set times. Excessively long fall-times result in recrystallization, hence, unsuccessful reset.
References:
[1] G. W. Burr et al., “Observation and modeling of polycrystalline grain formation in Ge2Sb2Te5,” J. Appl. Phys., vol. 111, no. 10, p. 104308, 2012.
[2] A. Faraclas et al., “Modeling of Thermoelectric Effects in Phase Change Memory Cells,” IEEE Trans. Electron Devices, vol. 61, no. 2, pp. 372–378, 2014.
[3] Z. Woods et al., “Modeling of Phase Change Memory: Nucleation, Growth and Amorphization Dynamics during Set and Reset: Part II – Discrete Grains,” IEEE Trans. Elec. Dev. (currently under review).
4:30 PM - EM07.09.04
Resistive Switching Memory Based on Silver-Doped Chitosan Thin Films
Charlotte Strobel 1 , Tanja Sandner 1 , Steffen Strehle 1
1 , Ulm University, Ulm Germany
Show AbstractResistive switching memory appears as promising two-terminal device strategy for various applications ranging from low-cost memory devices to neuromorphic computing and was studied intensively for metal-oxide systems such as TiOx and HfOx. Here, we report on resistive switching in the cationic biopolymer chitosan, which can be extracted from natural chitin by deacetylation using for instance crab or shrimp exoskeletons. Chitosan itself is a low-cost material being also transparent, flexible, non-toxic and biodegradable, which enables potentially its usage in diverse fields such as biointegrated devices, flexible systems or green electronics. To prepare the biopolymer thin films, 0.5 wt/vol% chitosan with a deacetylation degree of 75 to 85 % was dissolved in a 1 vol% acetic acid solution prepared with deionized water. After stirring and filtering, AgNO3 (e.g. 1 wt%) was added in varying concentrations in order to promote the ionic conductivity of the polymer. A resistive switching device was fabricated by spin coating the chitosan-based liquid onto glass substrates that were covered by a conductive and transparent fluorinated tin oxide film representing a common bottom electrode. After curing of the film at 60 °C for several hours, the top electrodes were fabricated by localized evaporation of 100 nm silver using a stencil mask. The chitosan-based devices prepared in this manner showed overall promising resistive switching characteristics that were stable for multiple write and erase cycles achieved by sweeping the voltage up to ±1.5 V. However, certain device to device variations and device degradations were also observed, which will be discussed in detail besides other effects emerging from the silver-ion concentration and the overall device fabrication procedure.
4:45 PM - EM07.09.05
Ionic Conductive Chalcogenide Films for Nanoscale Memories
Tomas Wagner 1 , Bo Zhang 1 , Silviya Valkova 1 , Radim Vala 1 , Max Fraenkl 1 , Pavel Rozsíval 1 , Milos Krbal 1
1 , University of Pardubice, Pardubice Czechia
Show AbstractA range of material systems exist in which nanoscale ionic transport and redox reactions provide the essential for switching as platform for reconfigurable electronic devices, atomic switching and biological like computing. One class relies on mobile cations, which are easily created by electrochemical oxidation of the corresponding electrode metal, transported in the insulating layer, and reduced at the inert counter electrode. These devices are termed electrochemical metallization memories (EMC) or conductive bridge random access memories1. The material candidates for electrolytes in such devices have been recently studied. They are amorphous sulphides, selenides2, also oxides SiO2, WO3, TiO2 or their combinations1 containing metal elements (Ag, Cu) gaining some portion of ionic conductivity and becoming mixed ionic-electronic conductors1-10.
The aim of this work is to present our current results on synthesis and resistive switching of chalcogenide based nanowire array cells and plane parallel cells.
The authors thanks to project Flexprint TA 01020022 and Epsilon TH02010414 of Technological Agency CR for financial support, also grants LM2015082 and CZ.1.05/4.1.00/11.0251 from the Czech Ministry of Education, Youth and Sports of the Czech Republic.
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3. Š. Stehlík, J. Kolár, M. Bartoš, Mil.Vlček, M. Frumar, V. Zima and T. Wágner, Sol.
State Ionics, 2010, 181, 1625.
4. J. Kolár, T. Wágner, V. Zima, Š. Stehlík, B. Frumarová, L. Beneš, Mil. Vlček and M.
Frumar, J. Non-Cryst. Solids, 2011, 357, 2223.
5. I. Kaban, P. Jóvári, T. Wágner, M. Bartos, M. Frumar, B. Beuneu, W. Hoyer, N.
Mattern and J. Eckert, J. Non-Cryst. Solids, 2011, 357, 3430.
6. Š. Stehlik, K. Shimakawa, T. Wágner and M. Frumar, J. Phys. D: Appl. Phys., 2012, 45
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7. J. Kolár,J. Macák, K. Terabe and T. Wágner, J. Mater. Chem. C, 2014, 2, 349.
8. B. Zhang, M. Fraenkl, J. M. Macak and T. Wágner, Mater. Lett., 2016,163, 4.
9. J. Akola, B. Beuneu, R. O. Jones, P. Jovari, I. Kaban, J. Kolár, I.Voleska and T.
Wágner, J. Phys. - Cond. Matt., 2015, 27, 485304.
EM07.10: Poster Session II
Session Chairs
Wednesday AM, November 29, 2017
Hynes, Level 1, Hall B
8:00 PM - EM07.10.01
Finite Element Modeling of Phase Change Memory Devices—Impact of Thermal Boundary Resistances
Jake Scoggin 1 , Zachary Woods 1 , Adam Cywar 1 , Helena Silva 1 , Ali Gokirmak 1
1 , University of Connecticut, Storrs, Connecticut, United States
Show AbstractThermal boundary resistances in nanoscale phase change memory (PCM) devices are critical regarding thermal cross-talk, reset currents, and cooling rates. The temperature dependence of thermal boundary resistances in phase change materials has not been well studied at elevated operating temperatures, and particularly the thermal boundary resistance of the molten phase of Ge2Sb2Te5 (GST) with insulators and metal contacts has not been reported. We estimate temperature dependent electron and phonon contributions to interfacial thermal transport for amorphous, fcc, and molten GST with SiO2 and TiN in the PCM operating temperature range (300 K~900 K) extrapolating from measurements performed from ~300 K to ~600 K [1-2] and molecular dynamics simulations [3-4]. In this study, we investigate the impact of thermal boundary resistances on cell performance using a custom phase change physics module in COMSOL Multiphysics which couples crystallization-amorphization dynamics with electro-thermal physics. This model captures temperature and electric field dependent materials’ properties, Peltier heating and cooling at interfaces, Thomson heat in bulk, latent heat of fusion, and dielectric breakdown [5], as well as heat of crystallization [6] and grain boundary effects [6].
References:
1. J. P. Reifenberg et al. “Thermal Boundary Resistance Measurements for Phase-Change Memory Devices,” IEEE Elec. Dev. Lett., vol. 31, no.1, 2010.
2. J. Lee et. al. “Phonon and electron transport through Ge2Sb2Te5 films and interfaces bounded by metals,” Appl. Phys. Lett., vol. 102, no. 19, p. 191911, May 2013.
3. B.N.J. Persson et al. “Phononic heat transfer across an interface: thermal boundary resistance,” J. Phys. Condens. Matter, vol. 23, no. 23, pp. 45009-12, 2011.
4. C.S. Wang et. al. “A study on the thermal resistance over solid–liquid–vapor interfaces in a finite-space by a molecular dynamics method,” Int. J. Therm. Sci., vol. 46, pp. 1203–1210, 2007.
5. A. Faraclas et al. “Modeling of Thermoelectric Effects in Phase Change Memory Cells,” IEEE Trans. Elec. Dev., vol. 61, no. 2, 2014.
6. Z. Woods et. al. “Modeling of Phase Change Memory: Nucleation, Growth and Amorphization Dynamics during Set and Reset: Part II – Discrete Grains,” IEEE Trans. Elec. Dev. (Under review).
8:00 PM - EM07.10.02
Modeling SiO2 Doped Ge2Sb2Te5 Phase-Change Memory Devices
Hunter Malboeuf 1 , Zachary Woods 1 , Jake Scoggin 1 , Helena Silva 1 , Ali Gokirmak 1
1 Electrical and Computer Engineering, University of Connecticut, Willington, Connecticut, United States
Show AbstractPhase change memory (PCM) devices store information in the phase of materials that can be rapidly and reversibly switched between amorphous and crystalline states. PCM devices can be integrated in high densities atop CMOS circuitry. The switching speeds in the order of nanoseconds, comparable to DRAM write times, can be achieved in PCM devices. The main challenges for large scale implementation of PCM devices as main computer memory are endurance and power consumption [1,2]. Various possible solutions are proposed including alternative device structures and doping of phase change materials. SiO2 doping of Ge2Sb2Te5 (GST) is one interesting approach which is expected to significantly reduce switching power and improve endurance and reliability [3].
Although introduction of SiO2 is referred to as doping, SiO2 does not blend with GST as dopants would in semiconductors. SiO2 is expected to stay as nanoscale particulates inside GST, forming a nano-composite. SiO2 particles are expected to reduce thermal conductivity and impact nucleation rates [3]. However, as the active area of PCM devices repeatedly heat up and melt, SiO2 is expected to move. Depending on the surface interaction of SiO2 and GST, the distribution of the SiO2 particles may stabilize over the first several reset-set cycles. Hence, modeling the motion and stable distribution of the SiO2 particles during initial cycles is useful for determining their effects in subsequent operations.
In this work, we perform a computational study using COMSOL Multiphysics, to model PCM cells with SiO2 doped GST. The motion of the particulates is simulated using two-phase laminar flow and level set physics modules combined with our electro-thermal [4,5] phase change model which simultaneously captures the electro-thermal operation and the amorphization-crystallization dynamics[6]. The impact of SiO2 doping, changes in the device performance as a function of doping level and operation conditions will be discussed.
References:
[1] F. Dirisaglik, “High-Temperature Characterization of Ge2Sb2Te5 Phase Change Memory Devices,” Ph.D. dissertation, University of Connecticut, Storrs, CT, USA, 2014.
[2] N. Kanan, “Phase Change Devices for Nonvolatile Logic,” Ph.D. dissertation, University of Connecticut, Storrs, CT, USA, 2017.
[3] S.W. Ryu, et al. “SiO2 Doped Ge2Sb2Te5 Thin Films with High Thermal Efficiency for Applications in Phase Change Random Access Memory,” Nanotechnology, vol. 22, no. 25, pp. 254005, 2011.
[4] A. Faraclas, et al. “Modeling of Thermoelectric Effects in Phase Change Memory Cells,” IEEE Trans. Elec. Dev., vol. 61, no. 2, 2014.
[5] G. Bakan, et al. “High-temperature Thermoelectric Transport at Small Scales: Thermal Generation, Transport and Recombination of Minority Carriers,” Sci Rep.,vol. 3, pp. 2724, 2013.
[6] Z. Woods, et al. “Modeling of Phase Change Memory: Nucleation, Growth, and Amorphization Dynamics During Set and Reset: Part II – Discrete Grains,” IEEE Trans. Elec. Dev., (under review).
8:00 PM - EM07.10.03
Design of Phase-Change Material Based on Lattice Distortion for Memory and Neuromorphic Device
Minho Choi 1 , Heechae Choi 2 , Sehyun Kwon 1 , Seungchul Kim 3 , Kwang-Ryeol Lee 3 , Jinho Ahn 1 , Yong Tae Kim 3
1 , Hanyang University, Seoul Korea (the Republic of), 2 , Virtual Lab. Inc., Seoul Korea (the Republic of), 3 , Korea Institute of Science and Technology, Seoul Korea (the Republic of)
Show AbstractWith recent advance in semiconductor and neuroscience technology, the era is coming to satisfy the attention to human-like operation and further artificial intelligence. The human-like computation can be performed by mimicking the brain architecture. Today’s scaling technology for semiconductor is about 14nm, and it could reach 7nm scale according to lithography technology. It allows low power consumption, low operation voltage, high density for integration for brain-inspired computational system. The phase-change random access memory (PRAM) is one of non-volatile memory devices to achieve this brain system. The PRAM uses phase-change materials (PCMs) as a core material that the phase is reversibly changed with Joule heating by electrical pulses. The amount of thermal energy, converted by the pulses, makes division between amorphous phase (high resistance) and crystalline phase (low resistance). The control of ratio between the phases makes the resistance separate multi-step resistances, the characteristics can be applied to spike-timing dependent plasticity (STDP) as a Hebbian synaptic learning observed in biological synapses.
One of the important factors to apply PRAM device is what material we use for neuromorphic system. Fabricated chips should gather the information, like learning process, to achieve neuromorphic system, and the process need much energy and long time. To resolve such problem, we took note of the effect of local distortion in PCMs. This effect of distortion shows element doping in PCMs, not confined to intrinsic property. In the previous study, we studied the lattice distortion when Bi atom is doped at Sb atom in In3SbTe2 (IST) compound among changed properties. For this reason, we have tried to design the well-distorted IST PCM with other element doping, and the main two factors are (1) that element is energetically stable as substitutional dopant in IST compound and (2) angular distortion is large to maximize that effect. The screening method, to select the optimal doping element in IST from many dopant, was tried using DFT calculation before experiment. Yttrium was selected as a proper dopant of many elements in IST compound. We demonstrate the properties of distortion with XRD, TEM, and electrical characteristics of Y-doped IST for neuromorphic device.
8:00 PM - EM07.10.05
Fabrication and Evaluation of a Self-Repairable Resistive Device for a Synaptic Device
Takahiko Ban 1 , Yukiharu Uraoka 2 , Shin-ichi Yamamoto 1
1 , Ryukoku University, Otsu Japan, 2 , Nara Institute of Science and Technology, Ikoma Japan
Show AbstractAs the information society develops, the role of semiconductor devices is becoming increasingly. However, the total amount of data handled by humankind will expand, reaching 44 Z bytes in 2020, and become complicated. In order to develop society, it will be necessary to have devices that store and process enormous amounts of information. Speed up and power saving of the device have been carried out by miniaturization. However, as miniaturization of devices approaches a single nanometer order, a new device replacing miniaturization is required. Devices and circuits imitating the human brain are drawing attention as one solution. It is believed that mimicking the human brain leads to improvement of computer recognition capability and power consumption performance. In this research, we are working on the fabrication of next generation storage devices by a synaptic device using variable resistance elements. By paying attention to the self-repairing capability possessed by some of the capacitors and imparting the repair capability to the resistive device, even if the resistance value once decreases, the resistance returns to the original high value with time. This resistive variable work is aimed at mimicking part of the brain function with a device, as an imitation of the work of weakening the synaptic connection in the case of weak stimulation.
A tantalum oxide (Ta2O5) film was deposited on the lower electrode deposited by an electron beam deposition (EB depo.), and the upper electrode was deposited similarly to fabricate a normal variable resistive memory. A structure in which manganese oxide (MnO2) was sandwiched between the Ta2O5 film and the lower electrode was prepared and a resistive device having self-repairing capability was prepared. As a self-repairing ability, MnO2 turns into Mn2O3 by heat and releases oxygen. The resistance value is restored by re-oxidation of the resistance change material by the changed Mn2O3 and the released oxygen. For this device, we succeeded in the development of the device which returns to the original high resistance state by applying a low bias voltage and time. It is short-term plasticity that is well-known as a synaptic movement. Short term plasticity refers to a phenomenon in which, when sporadic signal application is applied to an element, electrical characteristics return to initial conductivity with time. The electrical characteristics of the fabricated device were very similar to those of this short-term plasticity.
8:00 PM - EM07.10.06
Hybrid Neuromemristive System towards Human Brain-Scale Computation
Erika Covi 1 , Richard George 2 , Stefano Brivio 1 , Jacopo Frascaroli 1 , Hesham Mostafa 2 , Christian Mayr 3 , Giacomo Indiveri 2 , Sabina Spiga 1
1 , Laboratorio MDM, CNR-IMM, Agrate Brianza (MB) Italy, 2 Institute of Neuroinformatics (INI), University of Zürich and ETH Zürich, Zurich Switzerland, 3 Institute of Circuits and Systems, Technical University of Dresden, Dresden Germany
Show AbstractIn recent years, we have been witnessing a fast technology (r)evolution which is pushing research to find new efficient computing paradigms to combine the flexibility of a microprocessor with the efficiency (speed and power) of application specific integrated circuits (ASICs). Due to its excellent performance in terms of energy efficiency, fault tolerance, and information processing, the human brain is being object of reverse engineering in view of building new intelligent architectures able of learning and suitable for autonomous and mobile applications. Despite biologically inspired neuromorphic VLSI systems are very promising, there are still several challenges to be addressed [1]. Among those issues, the most formidable ones regard the development of a truly scalable bio-inspired non-von-Neumann electronic platform and the development of non-volatile online update and storage of synaptic weights. The former is usually addressed with standard CMOS technology with main efforts concentrated in neuromorphic circuit design. The latter, on the contrary, requires the introduction of non-conventional elements like the resistance switching (RS) devices in the semiconductor technology.
In this context, we demonstrate the physical connection and functional operation of a neuromorphic analog VLSI chip [2,3] and a RS device [4-6]. The chip operates in a biologically plausible manner following an exponential Integrate and Fire model, Winner Take All circuitry, and Spike Timing Dependent Plasticity evaluated through a slowly changing variable that models the neuron’s calcium concentration. The chip works in an asynchronous way and uses subthreshold CMOS circuits, which represents optimal solutions for energy downscaling. On-chip bias generators allow flexibility in the definition of the model parameters (amplitude and duration of the writing-waveform used for potentiation and depression of the memristive device), thus allowing the evaluation of several different switching regimes (analogue, digital…) and opening the possibility of testing different synaptic devices.
On the synaptic side, the connection strength is represented through the conductivity of the developed RS devices which store the synaptic weight depending on neuronal activity, thus demonstrating learning abilities. The weight change can be either gradual (analogue) or digital, therefore the devices are suitable for different computation methods. Moreover, all the operations are free of current compliance, which allows also gradual changes of the synaptic weight without additional circuit control elements.
In summary, this work paves the way for future monolithic neuromorphic VLSI circuits integrating CMOS neurons and RS artificial synapses.
[1] Indiveri and Liu Proc. IEEE 103 1379 (2015)
[2] Mostafa et al. Front. Neurosci. 9 357 (2015)
[3] Mostafa et al. ISCAS 926 (2016)
[4] Brivio et al. Appl. Phys. Lett. 109 133504 (2016)
[5] Covi et al. ISCAS 393 (2016)
[6] Covi et al. Front. Neurosci. 10 482 (2016)
8:00 PM - EM07.10.07
Computational Design of a Synapse Device Based on Phase-Change Material
Minkyu Shin 1 , Yongwoo Kwon 1
1 , Hong-ik University, Seoul Korea (the Republic of)
Show AbstractNeuromorphic chips mimicking human brain operations are now a center of attention due to their superior energy-efficiency to current von Neumann architecture computers. A neuromorphic chip comprises N-neurons and N2-synapses where N is about millions. Phase-change memory (PCM) is suitable for the synapse device. First of all, multiple intermediate resistance states between zero and one can be controllably formed, which corresponds to gradual change of synaptic strength in human brains. In addition, the PCM has excellent scalability and its process is matured in industry. Such analog characteristics can be better achieved when a PCM synapse device has larger on/off ratio and wider transition in its switching curve. In this study, we will investigate PCM cell design in terms of device geometry and constituent materials with a special emphasis on interface characteristics in order to improve the analog characteristics. First, two representative cell schemes used in industry for PCM fabrication will be analyzed by means of device simulation. Then, some cell design rules will extracted. Finally, a new cell design that maximizes the analog characteristics will be suggested.
Keyword : synapse device, neuromorphic, phase-change memory, device simulation
Symposium Organizers
Seyoung Kim, IBM T.J. Watson Research Center
Barbara De Salvo, Leti, CED-TECH
Hyunsang Hwang, Pohang University of Science and Technology
Shimeng Yu, Arizona State University
Symposium Support
Journal of Applied Physics | AIP Publishing
EM07.11: Devices for Neuromorphic Computation
Session Chairs
Julie Grollier
Yun Seog Lee
Wednesday AM, November 29, 2017
Hynes, Level 1, Room 110
8:30 AM - *EM07.11.01
Toward an Analog Neural Accelerator with 10 fJ per Operation using Resistive Synaptic Devices
Matthew Marinella 2 , Sapan Agarwal 1 , Robin Jacobs-Gedrim 1 , John Niroula 1 , Ron Goeke 1 , Alex Hsia 1 , Elliot Fuller 2 , Alec Talin 2 , Conrad James 1
2 , Sandia National Laboratories, Livermore, California, United States, 1 , Sandia National Laboratories, Albuquerque, New Mexico, United States
Show AbstractPerformance per watt, or energy per operation of modern computing systems has been exponentially improving for more than 7 decades. However, this rapid efficiency scaling has declined in the past decade due to the cessation of Dennard scaling. Specialized architectures with memory close to the computational are extracting some additional gains, but the subsequent several orders of magnitude of improvement will require disruptive technologies. The analog crossbar is a method of in-memory computation as a method of achieving energy efficiency of 10 fJ per neural operation for numerous common algorithms including deep learning. Weights are stored in resistive synaptic devices, which include oxide-RRAM, CBRAM, and more novel resistance change devices. Using these devices in an analog accelerator places new, challenging requirements on them – including linear write behavior and low write stochasticity while operating at >1Mohm resistances. We discuss fundamental challenges with oxide-RRAM and CBRAM due to the filamentary nature of these devices, as well as progress toward meeting these challenges. Finally, we will present promising new device options based on novel Li-based resistance change devices.
9:00 AM - EM07.11.02
A Universal Platform for Fabricating Organic Electrochemical Devices and their Applications in Neuromorphic Computing
Duc Duong 1 , Gregorio Faria 2 , Pongkarn Chakthranont 3 , Yaakov Tuchman 1 , Thomas F. Jaramillo 3 , Alberto Salleo 1
1 Materials Science and Engineering, Stanford University, Stanford, California, United States, 2 Instituto de Física de São Carlos, Universidade de São Paulo, São Carlos Brazil, 3 Department of Chemical Engineering, Stanford University, Stanford, California, United States
Show AbstractOrganic electrochemical devices (OEDs) operate by electrochemically oxidizing and/or reducing polymer thin films, thereby affecting the physical, chemical and electronic state of both said films and their environment. Owing to the ability of semiconducting polymers to withstand high mechanical strains, to be cost-effectively processed at room temperature, and to volumetrically uptake large amounts of electrolytes, OEDs have recently garnered much interest for applications in bioelectronics. In particular, it was recently shown that OEDs can be used to fabricate non-volatile, low-voltage neuromorphic transistors.
Despite recent advancements in device fabrications and materials developments, however, only a select few polymers have been found to stably operate as active channels in OEDs. Current state-of-the-art devices are fabricated using the highly conductive mixture of poly(3,4-ethylenedioythiophene) doped with poly(styrene sulphonate) (PEDOT:PSS). While this material system exhibits high transconductance and good stability, the chemical mixture is often unknown due to the proprietary nature of available formulations. Furthermore, because the polymer is highly conductive in its natural state, fabricated transistors are always ON and consume a large amount of electrical power. Recent synthetic efforts have led to the development of new materials with water soluble side chain containing sulfonates and alkoxy groups. These polymers are naturally non-conductive and can be used to make OEDs. Nevertheless, the vast majority of traditional semiconducting polymers do not uptake water, are not electrochemically oxidized or reduced in water, and therefore cannot be used as the active channel. In addition, because the channel is nearly always in direct contact with the aqueous system, device stability is dramatically reduced.
To this end, we have developed both device architectures and general material guidelines that allow for the fabrication of OEDs with semiconducting polymers that do not uptake water. The devices are shown to operate stably at room temperature, exhibit good transistor characteristics and be reproducibly fabricated using several different materials. By taking advantage of the immiscible nature between organic solvents and water, we are further able to build Liquid-liquid Phase Separated (LiPS) devices that can operate stably in aqueous environments. Because the organic polymer channel resides in the organic phase, it is also protected from many chemically active species that exist in the aqueous or biological environment. Using this process, we are able to fabricate highly stable, non-volatile neuromorphic transistors with water-insoluble semiconducting polymers. Our results ultimately allow us to open up the vast palette containing hundreds and thousands of materials that the organic electronics community have developed over the last several decades and, for the first time, apply them to build efficient, stable OEDs.
9:15 AM - EM07.11.03
Neuromorphic Device Architectures Using Electrolyte Gating
Paschalis Gkoupidenis 1 2 , Dimitrios Koutsouras 1 2 , George Malliaras 2
1 , Max Planck Institute for Polymer Research, Mainz Germany, 2 Department of Bioelectronics, Ecole Nationale Supérieure des Mines, CMP, Gardanne France
Show AbstractIn the neural environment, neural processing takes place in a complex and interwoven network of neurons and synapses. In addition, this network is immersed in a common electrochemical environment and global or homeoplasticity parameters such as ionic concentrations and concentrations of various hormones regulate the overall behaviour of the network. In this work, a common electrolyte is used in a grid of organic electrochemical devices. It is shown that the electrolyte can be used as a global or homeostatic parameter. It is also demonstrated that the electrolyte can also be used as a device-to-device connectivity medium. This work demonstrates the potential use of electrolytes as homeostatic and connectivity media in neuromorphic device architectures.
9:30 AM - *EM07.11.04
A Cross-Layer Design Study of Hardware Neural Network Enabled by Analog RRAM-Based Electronic Synapse
Chih-Cheng Chang 1 , Pin-Chun Chen 1 , Yu-Lin Shen 1 , Chih-Chun Su 1 , Teyuh Chou 1 , I-Ting Wang 1 , Che-Chia Chang 1 , Boris Hudec 1 , Tuo-Hung Hou 1
1 Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu Taiwan
Show AbstractHardware neural networks (HNNs) have been proposed to improve the form factor, cost, and power consumption of deep learning systems. The HNNs employing crossbar resistive memory (RRAM)-based synaptic arrays are particularly interesting because they may significantly improve the learning efficiency by fully parallelizing the vector-matrix multiplication (weighted sum) and weight update through the distributed weight storage. The successful implementation of such a HNN system relies on the new development of a cross-layer design methodology from physics, materials, devices, circuits, and algorithms. In this talk, we will introduce a fully analog electronic synapse based on atomic layer deposition and non-filamentary mechanism and showcase an example of applying it for designing a HNN protptype. This device with a thin stack thickness of sub 10 nm could potentially realize an artificial three-dimensional neural network with extremely high density and connectivity. Furthermore, we redesigned a hardware-applicable supervised perceptron algorithm and performed simulations using the MNIST handwritten digit dataset to benchmark the classification accuracy. We will discuss the strategies to overcome the non-ideal properties of the analog electronic synapse, namely finite weight precision and linearity. Finally, the preliminary testing results on a scale-down version of the HNN prototype will be discussed.
EM07.12: Neuromorphic Device III—New Concept and Novel Materials
Session Chairs
Tuo-Hung Hou
Matthew Marinella
Wednesday PM, November 29, 2017
Hynes, Level 1, Room 110
10:30 AM - *EM07.12.01
Learning Pattern Classification with Coupled Spin-Torque Nano-Oscillators
Miguel Romera 1 , Philippe Talatchian 1 , Flavio Abraujo 1 , Sumito Tsunegi 2 , Hitoshi Kubota 2 , Kay Yakushiji 2 , Akio Fukushima 2 , Shinji Yuasa 2 , Paolo Bortolotti 1 , Vincent Cros 1 , Damir Vodenicarevic 3 , Nicolas Locatelli 3 , Damien Querlioz 3 , Julie Grollier 1
1 Unité Mixte de Physique CNRS/Thales, Palaiseau, Université Paris-Sud, Orsay France, 2 , Spintronics Research Center, AIST, Tsukuba Japan, 3 Centre de Nanosciences et de Nanotechnologies, CRNS, Université Paris-Sud, Orsay France
Show AbstractBiological neurons emit periodic electrical spikes and can synchronize their rhythmic activity. Inspired from these features, many neural network models exploit synchronization to compute with assemblies of non-linear oscillators. It would be attractive to implement them in hardware, with industry-compatible nanoscale oscillators capable of synchronization. However, despite numerous proposals, there is today no demonstration of pattern recognition with coupled nano-oscillators. One difficulty is that training these networks requires tuning the coupling between oscillators. Here we show experimentally that thanks to their high frequency tunability, spintronic nano-oscillators can learn to perform pattern recognition through synchronization. We train a network of four weakly-coupled spin-torque nano-oscillators to recognize spoken vowels by tuning their frequencies according to an automatic learning rule. Through simulations we show that the high experimental recognition rates (up to 91%) stem from the weak-coupling regime and the high tunability of spin-torque nano-oscillators. These results open new paths towards highly energy efficient bio-inspired computing on-chip based on non-linear nano-devices.
This work was supported by the ERC grant bioSPINspired n°682955
11:00 AM - EM07.12.02
Spin-Torque Nano-Oscillator Driven by Spin Pumping for Phase-Based Neuromorphic Computing
Shaloo Rakheja 1 , Nickvash Kani 2
1 , New York University, Brooklyn, New York, United States, 2 Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia, United States
Show AbstractSpin pumping is the phenomenon in which a precessing magnet at RF frequencies induces a spin current in an adjacent non-magnetic channel [1, 2]. In this work, we model the dynamics of a spin-torque nano-oscillator (SNO) device that is driven by a spin-pumping current. The information is encoded in the phase (time-shift) of magnetization oscillations, and dipolar coupling between adjacent nanomagnets is utilized to exchange information. As such, the SNO will be used as an ultra-low-power and noise-immune substrate for phase-based neuromorphic computing including associative memory for pattern matching.
The magnetic bistability of the SNO assists in achieving frequency locking to a synchronization signal, which is required for initiating magnetization oscillations. Due to their substantial frequency non-linearity, SNOs can lock to a weak external signal over a broad bandwidth, which is attractive for neuromorphic applications. As no electric field is present in the channel, a pure spin-diffusion current carrying phase-encoded information flows through the channel. While Joule heating is incurred in the fan-in stage, the remainder circuitry uses only pure spin currents, which leads to significant energy savings at the circuit level. Information is processed and communicated in the spin domain without the need for signal conversion, which also leads to area savings.
To obtain the dynamics of the SNO device, we use the stochastic Landau Lifshitz Gilbert Slonczewski (s-LLGS) equation [3] by augmenting it with additional terms due to spin pumping, spin backflow, and dipolar coupling. Spin accumulation in a non-magnetic channel creates a spin backflow into the nanomagnet, which not only increases the Gilbert damping of the precessing nanomagnet but also reduces the net spin current available in the non-magnetic channel. The s-LLGS equation is solved self consistently with the spin diffusion equation to capture the accurate dynamics of the device. The dipolar coupling strength between the nanomagnets changes dynamically as the magnetization evolves over time. To account for the dynamic nature of the dipolar coupling in the SNO device, a tensor field model is used to represent the strength of the dipolar field. Using the theoretical model, we identify the optimal topology of the spin oscillator – in-plane versus out-of-plane oscillations – to simultaneously achieve high energy efficiency and low latency. We also identify the material and geometry requirements of the SNO to ensure correct logic functionality under thermal noise and manufacturing variability. A brief discussion on experimental techniques to be used to validate the theoretical models of the device is also presented.
[1] J. C. Slonczewski, Journal of Magnetism and Magnetic Materials, vol. 159, no. 1, pp. L1–L7, 1996.
[2] Y. Tserkovnyak et al., Physical Review B, vol. 66, no. 22, p. 224403, 2002.
[3] M. Stiles and A. Zangwill, Physical Review B, vol. 66, no. 1, p. 014407, 2002.
11:15 AM - EM07.12.03
Development of Dense and Highly Homogenous Quantum Dot—Microlaser Arrays for Optical Reservoir Computing
Tobias Heuser 1 , Jan Große 1 , Arsenty Kaganskiy 1 , Daniel Brunner 2 , Stephan Reitzenstein 1
1 , TU Berlin, Berlin Germany, 2 , FEMTO-ST, Besancon France
Show AbstractReservoir computing is a promising approach for a new way of parallel data processing, inspired by the interaction of neurons in the brain. Of particular interest is the diffractive optical coupling of a large number of microlasers in a 2D array to create a nonlinear network that will function as a reservoir [1]. The latter can be trained to perform a complex task, e.g. speech recognition at ultra-high speed [2]. Our concept is based on a dense arrays of hundreds of semiconductor micropillar lasers with self-assembled quantum dots in the active layer, where microlasers take a role comparable to neurons in the brain. Neuron-connectivity is being established via diffractive coupling by an external spatial light modulator and similar to the brain's primary sensory cortex, computation is provided by induced macroscopic network-dynamics. At the heart of our computing scheme is a spectrally homogenous array of up to 900 quantum dot micropillars which form the central hardware component for reservoir computing.
In this contribution we report on the development of dense arrays of micropillar lasers with diameters in the few-µm range and a pitch of about 10 µm to enable optical reservoir computing. In order to allow for efficient diffractive coupling of pillars by the external spatial light modulator, the array needs to be highly homogenous in terms of the emission energy of individual micropillars with relative deviations less than about 10-4 (i.e. spectral variation of less than 200 µeV). Moreover, the pitch between neighboring pillars needs to be precisely matched across the array with about 100 nm accuracy. In order to meet this strict technological goals, we optimized the growth of the planar AlGaAs/GaAs microcavity structure which respect to a very homogenous layer thickness across the wafer. Remaining thickness variations shift the resonance of the resonator and later also the emission energy of the micropillars based on planar microcavity. We resolve this issue by exploiting the fact that the emission energy of small diameter micropillars depends sensitively on the diameter via the tight light confinement [3]. By a precise spectral mapping of the planar resonance and a corresponding adjustment of each pillar diameter in the electron-beam lithography process we are able to compensate for the spectral inhomogeneity of the wafer material within a pillar array. In this way we realize dense and homogenous micropillar arrays with spectral inhomogeneity well below 200 µeV and quality factor up to about 10000. We show that such arrays are very suitable nanophotonic hardware components optical reservoir computing.
References:
1. D. Brunner, and I. Fischer, Opt. Lett. 40, 3854-3857 (2015).
2. D. Brunner, M. C. Soriano, C. R. Mirasso, I. Fischer, Nat. Commun. 4, 1364 (2013).
3. S. Reitzenstein, and A. Forchel, J. Phys. D. Appl. Phys. 43, 033001 (2010).
11:30 AM - EM07.12.04
Large Tunneling Electroresistance and Memristive Responses in Organic Ferroelectric P(VDF-TrFE)-Based Tunnel Junctions
Sayani Majumdar 1 , Qihang Qin 2 , Sebastiaan van Dijken 1
1 , Aalto University, Espoo Finland, 2 , VTT Technical Research Center, Espoo Finland
Show AbstractFerroelectric tunnel junctions (FTJs) are a promising candidate for non-volatile memories and memristor-based computing circuits. Recent years have witnessed a surge in interest for FTJs based on complex oxide materials like BaTiO3 (BTO) or Pb(Zr1-xTix)O3 (PZT) showing giant tunneling eletroresistance (TER) [1]. The TER effect is caused by a polarization-induced alteration of the mean tunnel barrier height that changes the tunneling probability of conduction electrons, thereby modifying the electrical resistance of FTJs. For inorganic FTJs, maintaining robust ferroelectricity is rather challenging in thin oxide films. It requires epitaxial growth of tensile films at high temperatures and under vacuum conditions, which severely limits the choice of substrate and, therby, its application potential. Ferroelectric copolymers such as P(VDF-TrFE) with chemical formula [(CH2–CF2)n – (CF2–CHF)n] could be used as an alternative barrier material, provided that large TER, reproducibility, long polarization retention, and good switching durability can be attained. Here, we report on the performance of organic FTJs comprising a spin-coated ferroelectric P(VDF-TrFE) tunnel barrier, one metal electrode, and one semiconducting Nb-doped SrTiO3 electrode [2]. We demonstrate very large TER effects of up to 107% at room temperature. The retention and endurance behavior of these junctions are excellent, showing less than one order of magnitude reduction of TER over a period of 10 years and minimal degradation after more than 1000 switching events [2]. Finally, we show reproducible memristive behavior by varying the amplitude and duration of the applied voltage pulses, which could be of interest to neuromorphic computing applications.
References:
[1] V. Garcia, M. Bibes, Nat. Comm. 2014, 5, 4289.
[2] S. Majumdar, B. Chen, Q. Qin, H. S. Majumdar, S. van Dijken, Adv. Func. Mater. (submitted).
11:45 AM - EM07.12.05
Peptide-Doped Lipid Membranes as Synaptic-Mimics
Joseph Najem 2 3 1 , Graham Taylor 2 3 , Stephen Sarles 3 , Charles Collier 2
2 , Oak Ridge National Laboratory, Oak Ridge, Tennessee, United States, 3 , University of Tennessee, Knoxville, Knoxville, Tennessee, United States, 1 , Oak Ridge National Laboratory/University of Tennessee, Oak Ridge, Tennessee, United States
Show AbstractSolid-state memristors exhibit voltage or current controlled conductance, enabling the implementation of bio-inspired synaptic functions in solid-state neuromorphic computing systems. They are usually constructed from silicon-based materials, bearing no structural resemblance to biological synapses. Moreover, current memristors fail to mimic the dynamics and selectivity of synaptic ion exchange that are believed to be essential for initiating various forms of synaptic plasticity, such as paired-pulse facilitation (PPF), short-term potentiation (STP), and long-term potentiation (LTP). In contrast, current memristive devices rely on engineered programming software to mimic plasticity, rather than mimicking natural synaptic dynamics that are governed by membranes and ion channels. Additionally, solid-state memristors require a complex design and suffer from high-energy resistance switching, which leads to energy consumption that is several orders of magnitude higher than in natural synapses (~1-100 fJ per synaptic event). Therefore, we believe a biomolecular approach offers untapped potential for constructing more realistic synaptic mimics. Here, we present a synthetic biomembrane system with peptide-regulated ion conductance that mimics vital operational principals of biological synapses. Our system consists of a droplet interface bilayer assembled at the conjoining interface of two lipid-encased aqueous droplets in oil. The droplets contain voltage-activated alamethicin peptides that are capable of creating conductive pathways for ion transport through the insulating lipid membrane. The insertion of the peptides and formation of ion channels is achieved at externally applied potentials higher than ~70 mV. Just like in biological synapses, where the incorporation of additional receptors is responsible for changing the synaptic weight (i.e. conductance), we demonstrate that the weight of our synaptic mimic may be changed by controlling the number of alamethicin ion channels driven into a synthetic lipid membrane. More alamethicin peptides are incorporated by increasing the post-threshold external potential, thus, leading to higher conductance levels for ion transport. The current-voltage responses of the alamethicin-based synapse also exhibit "figure 8"-shaped hysteresis loops. We demonstrate the system’s capability of exhibiting PPF, STP and LTP behaviors in response to high-frequency (50 ms width) voltage pulses. Moreover, alamethicin peptides exhibit significantly different behaviors in membranes constructed from different lipid types. Specifically, higher conductance levels and lower activation (switching) thresholds are observed with peptide-doped BTLE (brain total lipid extracts) membrane. We also find that BTLE membranes heated to 50o C helps “store” the change in weight by exhibiting significantly longer relaxation times before it goes to a higher-resistance state, when the switching pulses are turned off, or their frequency is decreased.
EM07.13: Neuromorphic Device and Application II
Session Chairs
Wednesday PM, November 29, 2017
Hynes, Level 1, Room 110
1:30 PM - *EM07.13.01
Large-Area-Electronics Systems Enabled by Machine-Learning Algorithms
Naveen Verma 1 , Yasmin Afsar 1 , Yoni Mehlman 1 , Tiffany Moy 1 , Can Wu 1 , Sigurd Wagner 1 , James Sturm 1
1 , Princeton University, Princeton, New Jersey, United States
Show AbstractLarge-area electronics (LAE), based on low-temperature processing of thin-film dielectrics, conductors and semiconductors, enables fabrication of diverse transducers, densely integrated on expansive and form-fitting substrates. This raises transformational possibilities for sensing, both through an extremely large cross-section, thereby leading to acquisition of a great amount of information, and through tight deployment on physical objections, thereby leading to semantic association between acquired data and activities/events in an environment. The problem is that the devices available in LAE for computation over the sensor data are extremely limited, in terms of performance, energy efficiency, and variability. This necessitates hybrid architectures, which combine LAE with silicon-CMOS electronics for realizing full systems1.
Though hybrid systems bring together synergistic technological capabilities, the challenge is interfacing a large number of LAE sensors with the silicon-CMOS ICs. This talk explores solutions to this challenge. The primary insight explored is that, in cases where many sensors are available, it is likely not the individual data from each of these that is of interest. Rather, higher-level aggregated information over large number of the sensors is of greatest interest. This points us to algorithms from machine learning and statistical signal processing for extracting specific information for inference, in order to substantially ease the interfacing.
In inference systems, data is reduced to decisions through feature extraction and classification stages. Given the limitations of LAE devices, the realization of these stages requires specialized algorithms and computational models aligned to the characteristics of the available LAE devices, namely thin-film transistors (TFTs). For illustration, such algorithms and computational models, along with prototyped TFT architectures for feature extraction2,3 and classification4, are presented
N. Verma, et al., "Enabling Scalable Hybrid Systems: architectures for exploiting large-area electronics in applications," Proc. of IEEE, vol. 103, no. 4, pp. 690-712, April 2015.
T. Moy, et al., "A Thin-film, Large-area Sensing and Compression System for Image Detection," IEEE Trans. on Circuits and Systems I, Vol. 63, no. 11, pp. 1833-1844, Nov. 2016.
Y. Afsar, et al. “Large-Scale Acquisition of Large-Area Sensors Using an Array of Frequency-Hopping ZnO Thin-Film-Transistor Oscillators,” IEEE Int'l Solid-State Circuits Conf., Feb. 2017, pp. 256-257.
W. Rieutort-Louis, et al., “A Large-area Image Sensing and Detection System Based on Embedded Thin-film Classifiers” Int'l Solid-State Circuits Conf., Feb. 2015, pp. 292-293.
2:00 PM - EM07.13.02
Multi-Contact Phase Change Logic Devices
Raihan Sayeed Khan 1 , Nadim Kan'an 1 , Jake Scoggin 1 , Zachary Woods 1 , Lhacene Adnane 1 , Anna Gorbenko 1 , Ali Gokirmak 1 , Helena Silva 1
1 , University of Connecticut, Storrs, Connecticut, United States
Show AbstractPhase change memory (PCM) devices can be reversibly switched between highly resistive amorphous and conductive crystalline states using electrical pulses [1]. High-density PCM cross-bar arrays can be integrated atop CMOS for high density non-volatile storage on chip as well as alternative approaches for computation (e.g. neuromorphic computing). However, the CMOS overhead for memory controllers can be substantial for both cases. Carrying some of the logic functionality to the memory layer can substantially reduce the CMOS overhead, making it possible to integrate 100s of GB of PCM storage atop a conventional CPU. Multi-contact phase change structures integrated with CMOS offer approximately 50% reduction in CMOS for common functions as routing and multiplexing [2], [3].
The multi-contact structures investigated in this study utilize isolation of some of the contacts from the others using amorphized regions. The amorphized regions are formed by passing sufficiently large currents between pairs of contacts (write terminals). These amorphous regions can be recrystallized and others can be amorphized utilizing different pairs of write terminals. Each of these terminals are interfaced with nMOSFET and pMOSFETs to achieve the desired circuit functionality.
We have investigated functionality of various multi-contact phase change logic elements using our unified finite element model that simultaneously captures amorphization-crystallization dynamics and electro-thermal phenomena using COMSOL Multiphysics. We will be presenting the computational and preliminary experimental results demonstrating the functionality of these structures and performance parameters.
References:
[1] H. P. Wong et al., “Phase change memory,” Proc. IEEE, vol. 98, no. 12, pp. 2201–2227, Oct. 2010.
[2] N. Kan’an, H. Silva, and A. Gokirmak, “Phase change pipe for nonvolatile routing,” IEEE J. Electron Devices Soc., vol. 4, no. 2, pp. 72–75, 2016.
[3] N. H. Kanan, “Phase Change Devices for Nonvolatile Logic,” University of Connecticut, 2017.
2:15 PM - EM07.13.03
Data-Driven Analysis of Magnetism in Transition-Metal Thin Films on MgO(001)
Kohji Nakamura 1 5 , Kohei Nozaki 1 5 , koji Hukushima 2 5 , Hiori Kino 5 , Masato Okada 3 5 , Toru Akiyama 1 , Tomonori Ito 1 , Tamio Oguchi 4 5
1 , Mie University, Tsu Japan, 5 , National Institute for Materials Science, Tsukuba Japan, 2 , The University of Tokyo, Komaba Japan, 3 , The University of Tokyo, Kashiwa Japan, 4 , Osaka University, Ibaraki Japan
Show AbstractComputational approaches for exploring materials with many exciting properties continue to grow in modern material science. In field of spin-electronics, searching promising ferromagnetic transition-metal multilayer thin-films with large perpendicular magnetocrystalline anisotropy (MCA) is strongly desired, e.g., for successful magnetic tunnel junction devices. One key way designing large perpendicular MCA materials may be tuning of atomic-layer alignments in multilayer thin films.[1] Here, with an assist of the machine-learning technique, we analysis magnetic moments and magnetocrystalline anisotropy for prototypical multilayers of binary Fe-Au, Co-Au, and Fe-Co thin films on MgO(001), and reveal underlying trends, i.e., key atomic-layer alignments for the magnetism. Calculations were carried out by using full-potential linearized augmented plane-wave method [1] for single slabs with six atomic-layers of the binary films on MgO(001). All atomic-layer configurations (26=64) for all thin-film systems were considered. By using an exhaustive search method [2] with atomic cluster correlation functions [3] of points and pairs, we find that the magnetic moments are mainly represented by using the point correlation functions. Thus, the magnetic moments depend on the composition of the transition-metals (Fe and Co), which can be simply understood that the atomic exchange splitting hardly alters much in different atomic configurations. A small deviation from the composition dependence is explained by the nearest-neighbor pair correlation functions. In contrast, the MCA energy strongly depends on the atomic-layer alignments; for Fe-Au (Co-Au) thin films, there is very large variation from 4.8 (6.1) meV/atom-area of the perpendicular MCA to -2.5 (-1.2) meV/atom-area of the in-plane MCA, even in the same compositions, while for Fe-Co thin film, the variation is rather small from 1.4 to -1.5 meV/atom-area. The exhaustive search method successfully leads to a set of key atomic-layer alignments for large perpendicular MCA.
References
[1] K. Hotta et al., Phys. Rev. Lett. 110, 267206 (2013). [2] H. Ichikawa, et al., Front. Hum. Neurosci. 8, 00480 (2014). [3] J. W D. Connolly and A. R. Williams, Phys. Rev. B 27, 5169 (1983).
EM07.14: Neuromorphic Device IV—New Concept and Novel Materials
Session Chairs
Tuo-Hung Hou
Naveen Verma
Wednesday PM, November 29, 2017
Hynes, Level 1, Room 110
3:30 PM - *EM07.14.01
Uniform Epitaxial Si Memory by One-Dimensional Filament Confinement for Large-Scale Synaptic Arrays
Shinhyun Choi 1 , Scott Tan 1 , Yunjo Kim 1 , Jeehwan Kim 1
1 , Massachusetts Institute of Technology, Cambridge, Massachusetts, United States
Show AbstractNeuromorphic computing has recently emerged as a non-Von Neuman computing method. Because its analog switching ability to represent multiple synaptic weights by varying conductance in the vertical filaments formed in the switching medium, a memristor has been considered as a suitable neuromorphic hardware platform. Conventional memristors typically utilize a defective amorphous solid as a switching medium for defect-mediated formation of conducting filaments. However, the imperfection of the switching medium also causes stochastic filament formation leading to spatial and temporal variation of the devices. In this talk, we introduce a silicon-based epitaxial random access memory (epiRAM), where we precisely confined the conducting paths in the single-crystalline films resulting in unprecedented device performances. MIT’s epiRAM exhibits extremely low temporal/spatial variation, linear synaptic weight update, high on/off ratio (250 for analog/10,000 for digital), great endurance (>109), and long retention time (2 days at 85oC). Furthermore, epiRAM exhibit self-selection capability that can suppress sneak path during large-scale array operation. Our simulation using the MNIST handwritten recognition dataset further proves that epiRAM operate with superior online learning accuracy of 93 % comparable to the software training baseline. Thus, our discovery of epiRAM is a key step paving the way towards post von Neumann computing.
4:00 PM - EM07.14.02
Multi-Terminal Memtransistors from Polycrystalline Monolayer MoS2
Vinod Sangwan 1 , Hong-Sub Lee 1 , Hadallia Bergeron 1 , Itamar Balla 1 , Kan-Sheng Chen 1 , Megan Beck 1 , Mark Hersam 1
1 , Northwestern University, Evanston, Illinois, United States
Show AbstractThe memristor, a 2-terminal passive circuit element, has recently been developed for non-volatile resistive random-access memory (ReRAM). Compared to flash memory, memristor-based ReRAM has higher endurance, multi-bit data storage, and faster read/write times. However, the footprint on an integrated chip is compromised by the one-transistor/one-memristor (1T1M) cross-bar architecture, where a transistor is needed to selectively address individual memristors in a cross-bar array. In parallel with ReRAM, memristors have been explored in neuromorphic devices for brain-like computing. Although 2-terminal memristors show promise for basic neural functions, synapses in the human brain outnumber neurons by more than a factor of 1000, which implies that multi-terminal memristors are needed to achieve complex functions such as heterosynaptic plasticity. Previous attempts to address these limitations include the 3-terminal electrochemical cell by Widrow-Hoff and field-effect transistors with nanoionic gates or a floating gate, albeit without memristive switching in the transistor.
In this talk, we will present the experimental realization of a multi-terminal hybrid memristor and transistor (i.e., memtransistor) using monolayer MoS2. Scalable fabrication is achieved by using polycrystalline MoS2 grown by chemical-vapor deposition (CVD). Two-dimensional (2D) MoS2 memtransistors show gate tunability in individual states by 4 orders of magnitude in addition to high switching ratios (>100) and cycling endurance (~500). Furthermore, 6-terminal MoS2 memtransistors possess heterosynaptic functionality that is not achievable using 2-terminal memristors. For example, the conductance between a pair of two floating electrodes (pre-synaptic and post-synaptic neurons) is varied by ~10 times by applying voltage pulses to modulatory terminals. In situ scanning probe microscopy and variable temperature charge transport measurements reveal that bias-induced MoS2 defect motion drives resistive switching by dynamically varying Schottky barrier heights. By integrating the function of a memristor and transistor into one multi-terminal device, this approach has the potential to simplify the 1T1M architecture. In addition, the atomically thin platform gives unprecedented flexibility in device design and thus could enable complex Hebbian learning. Finally, memristive switching is observed in an open system compatible with in situ measurements that provides opportunities for studying the unique physics of defect kinetics in 2D materials.
4:15 PM - EM07.14.03
A Nano-Electromechanical Memristor
Mario Hofmann 1 , Ya-Ping Hsieh 2 , Ding-Rui Chen 3
1 , National Taiwan University, Taipei Taiwan, 2 , Academia Sinica, Taipei Taiwan, 3 , National Chung Chen University, Chiayi Taiwan
Show AbstractMemristors represent a group of two-terminal devices whose conductance is determined by the time integral of the applied charge. This behavior represents a fourth circuit element that was predicted by symmetry considerations and has been realized in different configurations, such as thin films, polymers, ferroelectrics, etc.
We here present a novel nanoelectromechanical memristor device that combines the desirable properties of resistive switching devices, such as high speed and robustness, with a proportional and tunable switching behavior that is controlled by the history of the applied voltage.
The presented device is a nanometer-sized double-membrane switch that consists of two graphene layers, a two-dimensional carbon allotrope. This structure was produced in a scalable fashion using a self-alignment strategy and was found to switch within 1us and without deterioration even after 10,000 cycles as confirmed by in-situ Raman spectroscopy.
Different from traditional mechanical switches, our device exhibits a bipolar switching behavior where the transition from a low-resistance to a high-resistance state only occurs if a high negative voltage is applied. Thus, a bistable memory-type was established in which the resistance at zero bias depended on the prior switching history. The magnitude of the resistance was found to be proportional to the previously applied charge over a wide range. This novel behavior was ascribed to a reshaping of the membrane under varying electrostatic forces. The direct relation between input parameter and several fundamental device properties was shown to enable multilevel data storage and novel applications for future electronic devices.
4:30 PM - EM07.14.04
Inkjet Printed HfO2-Based ReRAMs—First Demonstration, Performance and a First Insight in Mechanisms
Giovanni Vescio 1 , Gemma Martín 1 , Albert Crespo-Yepes 2 , Sergi Claramunt 2 , Daniel Alonso 2 , Julian López-Vidrier 3 , Sònia Estradé 1 , Marc Porti 2 , Rosana Rodriguez 2 , Francesca Peiró 1 , Albert Cornet 1 , Albert Cirera 1 , Montserrat Nafría 2
1 Engineering, Electronics, University of Barcelona, Barcelona Spain, 2 Electronic Engineering, Universitat Autònoma de Barcelona, Barcelona Spain, 3 , Albert-Ludwigs-University Freiburg, Freiburg Germany
Show AbstractThe rising appeal for flexible, transparent, lightweight and cheap circuits or devices for current applications on medicine, sensing or IoT, is driving the development of emerging technologies into the field of printed electronics as an alternative to the Silicon technologies. Despite the micrometric area resolution, printing technologies provide many advantages for several applications where Integrated Circuits are not strictly needed, reducing extremely the fabrication cost and the ecological impact. Up to now, bendable OLED displays, RFID antennas, solar cells, sensors and transistors have been developed by means of different printing technologies. In order to increase the benefits of these printed devices, many efforts are being spent on fulfilling the demands of small-size, low consumption and simple memories.
In this work, we focus on the application of inkjet-printed HfO2 as flexible thin film dielectric layer for HfO2-based ReRAM devices. An HfO2 ink for InkJet printing was previously developed for high-K capacitors [1]. The results demonstrate that it is possible to implement low-cost and high-performance non-volatile memories by the inkjet printing technique, achieving comparable features than with conventional CMOS-compatible ReRAM devices [2].
The samples used were MIM structures based on Au/HfO2/Ag and Pt/HfO2/Ag stacks that were fabricated onto silicon substrate. The current-voltage measurements showed that the Pt bottom electrode enhances the memory window and increases the endurance of SET and RESET operations, ~103 cycles. In addition, the devices showed low SET and RESET voltages and relatively low switching current (~1 µA), which are comparable to the characteristics of current commercial CMOS memories. In order to understand the resistive switching mechanism, direct structural observation is carried out by field-emission scanning electron microscopy (FE-SEM) and high-resolution transmission electron microscopy (HRTEM) on cross-sectioned samples prepared by focused ion beam (FIB). Electron energy loss spectroscopy (EELS) inspections discard a silver electromigration effect, evidencing that the resistive switching mechanism is due to the formation of a oxygen vacancy-based conductive filament through the HfO2 layer [3].
[1] G. Vescio, J. López-Vidrier, R. Leghrib, A. Cornet, and A. Cirera, Flexible inkjet printed high-k HfO 2 -based MIM capacitors, J. Mater. Chem. C, 4 (2016) 1804
[2] G. Vescio, A. Crespo-Yepes, , D. Alonso, S. Claramunt, M. Porti, A. Cornet, A. Cirera, M. Nafría, X. Aymerich, Inkjet Printed HfO2-Based ReRAMs: First Demonstration and Performance Characterization, IEEE Electron Device Letters,. 38 (2017) 457
[3] G. Vescio, G. Martín, A. Crespo-Yepes, , S. Claramunt, 2 D. Alonso, 2 J. López-Vidrier, 3 S. Estradé, M. Porti, 2 R. Rodriguez, 2 F. Peiró, A. Cornet, A. Cirera, M. Nafría, Low-Power High-Performance Non-Volatile Inkjet Printed HfO2-based ReRAM: from device to nanoscale characterization, submitted