Yoshihisa Fujisaki, Hitachi Ltd.
Panagiotis Dimitrakis, NCSR "Demokritos"
Daping Chu, University of Cambridge
Daniel Worledge, IBM T. J. Watson Research Center
Symposium Support M. Watanabe amp; Co., Ltd.
Micron Technology Foundation, Inc.
Radiant Technologies, Inc
Tuesday PM, April 02, 2013
Moscone West, Level 3, Room 3008
2:30 AM - *DD3.01
Spin-transfer Torque RAM with Perpendicular Magnetic Materials
Guohan Hu 1
1IBM T J Watson Research Center Yorktown Heights USAShow Abstract
Spin-transfer torque random access memory (STT-RAM) is an emerging memory technology that possesses a unique combination of density, speed, endurance, and non-volatility. It was recognized very early on that a free layer with perpendicular magnetic anisotropy (PMA) would greatly reduce the switching voltage, compared to an in-plane magnetic free layer with the same thermal stability. However, only recently were PMA materials successfully incorporated into STT devices. This talk will give a brief overview of STT-RAM utilizing perpendicular magnetic materials and then describe work at IBM in this field.
The PMA materials we used included a bottom CoFeB free layer with interfacial PMA and top reference layer with Co|Pd based multilayer. Tunneling magneto-resistance (TMR) ratio up to 98% was achieved in these PMA stacks, when a thin Ta spacer layer was incorporated between the CoFeB interfacial layer and the Co|Pd multilayer reference layer. X-ray diffraction measurements showed that the Ta spacer layer promotes the CoFeB interfacial layer to crystallize into (001) texture during annealing. Electron energy loss spectra suggested that the Ta spacer layer provided a very effective diffusion barrier during annealing to inhibit Pd diffusion to the CoFeB|MgO interface. Both factors were known to be critical to achieve high TMR. On the patterned device level, magnetic tunnel junctions of ~ 100 nm diameter showed strong perpendicular magnetization, two remnant states, and good spin torque switching with good thermal stability. In particular, the switching speed was shown to be 8x faster than for in-plane magnetized devices . Deeply scaled devices with size down to 20nm were also fabricated and characterized. The switching current decreased with device size as expected, down to 30 uA for a 20 nm device. A very high spin torque efficiency (~1 kBT/µA), defined as the ratio of activation energy to switching current, was observed in 20nm devices, approaching the macrospin model spin torque efficiency limit .
 D. C. Worledge et al. APL 98 022501 (2011)
 M Gajek et al. APL 100 132408 (2012)
3:00 AM - DD3.02
Light-induced Magnetization Reversal of High-anisotropy TbCo Alloy Films
Mirko Cinchetti 1 Sabine Alebrand 1 Matthias Gottwald 2 3 Michel Hehn 2 Daniel Steil 1 Daniel Lacour 2 Eric E. Fullerton 3 Martin Aeschlimann 1 Stephane Mangin 2
1University of Kaiserslautern Kaiserslautern Germany2UMR CNRS 7198, Universitamp;#233; de Lorraine Vandoeuvre-lamp;#232;s-Nancy France3University of California San Diego USAShow Abstract
Magnetization reversal using circularly polarized light provides a way to control magnetization without any external magnetic field and has the potential to revolutionize magnetic data storage . So far, optical magnetization reversal has been demonstrated only for GdFeCo, a rare earth-transition metal alloy with modest perpendicular magnetic anisotropy [1-3]. Crucially, for ultra-high density data storage, optically recordable magnetic materials exhibiting larger perpendicular magnetic anisotropy are needed. Staying in the class of rare earth- transition metal alloys, the most straightforward solution would be to replace Gd with Tb, since Tb has a significant orbital momentum. Indeed, ferrimagnetic TbxCo1-x alloy films exhibit strong perpendicular magnetic anisotropy and have been already used in conventional magneto-optical recording. Here, we study the feasibility of all-optical switching on TbxCo1-x films which exhibit a strong perpendicular magnetic anisotropy, varying the Tb composition from x=12% to x=34%. We evidence all-optical magnetization switching for different TbxCo1-x ferrimagnetic alloy compositions using femtosecond- and picosecond-laser pulses and demonstrate all-optical switching for films with anisotropy fields reaching 6T corresponding to anisotropy constants of 3x106 ergs/cm3 . Our results show that all-optical switching depends on both the Tb concentration and the properties of the exciting laser pulse. Moreover, optical magnetization switching is observed only for alloy compositions where the compensation temperature can be reached through sample heating. These experiments demonstrate the potential of the use of circularly polarized light for magnetic data storage technology and provide a crucial piece of information for understanding the physics of optical switching.
 C.D. Stanciu, F. Hansteen, A.V. Kimel, A. Kirilyuk, A. Tsukamoto, A. Itoh,and T. Rasing, Phys. Rev. Lett. 99, 047601 (2007)
 D. Steil, S. Alebrand, A. Hassdenteufel, M. Cinchetti, and M. Aeschlimann, Phys. Rev. B 84, 224408 (2011)
 S. Alebrand, A. Hassdenteufel, D. Steil, M. Cinchetti, and M. Aeschlimann, Phys. Rev. B 85, 092401 (2012)
 S. Alebrand, M. Gottwald, M. Hehn, D. Steil, M. Cinchetti, D. Lacour, E. E. Fullerton, M. Aeschlimann, and S. Mangin, Appl. Phys. Lett. 101, 162408 (2012)
3:15 AM - DD3.03
High Tc Low Dimensional Semiconducting Ferromagnetic Iron Selenides for Spintronics
Pierre Ferdinand Poudeu Poudeu 1
1University of Michigan Ann Arbor USAShow Abstract
There is widespread interest in exploring new chalcogenide materials with low-dimensional and flexible crystal structure. Such compounds are attractive platforms for the integration within a single material, of multifunctionalities such as ferromagnetism and semiconducting or metallic conductivity, two properties that are generally difficult or impossible to combine in a conventional inorganic solid. The ability to develop such bi-functionality within a single material is of tremendous fundamental importance and could impact next-generation technologies such as spintronics, thermoelectrics, sensors. Growing interest in the development of spintronic technologies- which utilize both the charge and spin of electrons - has been revitalized by the discovery of ferromagnetism in Mn-doped GaAs . However, the realization of practical devices based on Ga1-xMnxAs or other dilute magnetic semiconductors has been inhibited by their low ferromagnetic transition temperature (Tc). Enhancing ferromagnetism in the cubic Ga1-xMnxAs for example, requires the ability to control the distribution of Mn atoms in the GaAs structure, which is difficult to achieve the high symmetry cubic structure of GaAs. This makes it difficult to independently control the ferromagnetism, carrier type, carrier density and mobility in the materials and therefore, severely impedes our ability to study and understand the mechanism of carrier-mediated ferromagnetism necessary for efficient spintronic materials. Multinary metal chalcogenides such as Pb4Sb4Se10, Pb4Sb6Se13 and Pb6Sb6Se17 because of their low symmetry as well as the diversity and flexibility of their framework structures (dimensionality varies from 1D to 3D), are very attractive platform for the design and manipulation of new low - dimensional high Tc ferromagnetic semiconductors through selective substitution of some Pb atoms by magnetic transition metal elements such as Mn, and Fe. We will discuss some of our recent findings in the (Fe,Mn)/Pb/Sb(Bi)/Se systems. Emphasis will be placed on structure - composition - property relationships in FexPb4-xSb4Se10 , FeSb2-ySnySe4 , and FeBi2-ySnySe4 phases.
 H. Ohno et al. Appl. Phys. Lett. 69, 363 - 365 (1996).
 P. F. P. Poudeu; et al. J. Am. Chem. Soc., 132, 5751 - 5760 (2010).
 H. Djieutedjeu et al. Angew. Chem. Int. Ed. 49, 9977 - 9981 (2010).
* email@example.com (PFPP)
3:30 AM - DD3.04
Flexible Nonvolatile Ferroelectric Memory Based on a ZnO Nanowire Field Effect Transistor
Young Tea Chun 1 Stanko Nedic 2 Mark Welland 2 Daping Chu 1
1University of Cambridge Cambridge United Kingdom2University of Cambridge Cambridge United KingdomShow Abstract
Zinc Oxide (ZnO) nanowire (NW) field effect transistors (FETs) have been increasingly popular recently as promising building blocks for nanotechnology. ZnO NWs have a relatively good metal electrode-semiconductor ohmic contact, which results in a high device fabrication yield. Currently, organic field effect transistors (OTFTs) with ferroelectric materials have been researched extensively owing to their nonvolatile memory and nondestructive readout and flexible application . In particular, ferroelectric memory NW FETs is still very rare , while their thin film counterparts are relatively widespread .
This work demonstrates the feasibility of flexible and conventional nonvolatile memories based on a ZnO NW FET configuration. Single NW and network NW FET configurations have been compared in terms of their associated ferroelectric memory properties.
Hereby, ZnO NWs have been grown via chemical vapor transport with their dimensions ranging from 100-200 nm in diameter and up to 10 um in length. Our conventional ZnO NW FETs on highly doped thermally oxidized silicon substrates show a high on to off current ratio of up to 106-107 with an anticlockwise hysteresis loop present on the transfer curve. With ferroelectric material, the device showed at least 5 volts memory window and can be tuned by varying the gate voltage sweep range. Flexible substrates with high temperature and solvent exposure tolerance have been utilized for fabrication of ZnO NW FETs with a 200 nm thick PVDF-TrFE ferroelectric material. The top-gate configurations have been prepared by spin coating a 5 wt% solution of PDVF-TrFE powder (70/30 molar ratio) in cyclohexane. After spin coating, the ZnO NW FETs with PVDF-TrFE thin films have been thermally cured in a vacuum oven at 160°C for 2 hours. Memory effect of flexible device was verified by the counterclockwise direction of the transfer curve hysteresis of the devices. The role of flexible substrate treatment and memory characteristic damage on bending behavior will be discussed.
 T. Sekitani et al., Science, Vol. 326, 1516, (2009)
 D. Yeom et al., Nanotechnology, 19, 395204, (2008)
 K.H. Lee et al., Adv. Mater., 21, 4287, (2009)
3:45 AM - DD3.05
Charge-mediated Coupling in Ferroelectric/Ferromagnet Heterostructures: A Variety of Phenomena for Non-volatile Memories
Igor Stolichnov 1 Evgeny Mikheev 1 Zhen Huang 1 Andrew W Rushforth 2 Richard P Campion 2 Kevin W Edmonds 2 Bryan L Gallagher 2 Elisa De Ranieri 3 Joerg Wunderlich 3 Sebastian Riester 1 Nava Setter 1
1EPFL-Swiss Federal Institute of Technology Lausanne Switzerland2University of Nottingham Nottingham United Kingdom3Hitachi Cambridge Laboratory Cambridge United KingdomShow Abstract
Ferroelectric control of ferromagnetism is a highly attractive device concept with potential applications in data storage and spintronic logic elements. Of particular interest are hetero-layered ferroelectric/ferromagnetic systems with charge-mediated coupling with FET architecture.
Further to our proof-of-concept results showing ferroelectric control of ferromagnetic Curie temperature in magnetic semiconductors here we show a variety of non-volatile effects associated with multiferroic coupling. One of the most spectacular manifestations of this coupling is a ferroelectric control of magnetic domain propagation. Both magnetotransport and magnetooptical experiments clearly demonstrate that ferroelectric polarization domains strongly influence ferromagnetic domain nucleation and kinetics resulting in superimposed ferroic patterns strongly coupled by electric field.
In alternative approach we show a deterministic ferroelectric switching of the magnetotransport anisotropy in magnetic semiconductor (Ga,Mn)(As,P) channels. The persistent field effect is shown to be capable of strongly modulating the AMR magnitude. Furthermore, ferroelectric gate switching has a profound impact on the nature of AMR, changing the symmetry of the effect and enhancing/suppressing the crystalline component of AMR.
Recent progress in ferroelectric control of ferromagnetism in metals at room temperature suggests that our results are highly relevant to multiferroic non-volatile memory devices.
Tuesday PM, April 02, 2013
Moscone West, Level 3, Room 3008
4:30 AM - *DD4.01
Nonvolatile Programmable Logic Array Using Complementary Atom Switch
Toshitsugu Sakamoto 1 Makoto Miyamura 1 Munehiro Tada 1 Hiromitsu Hada 1
1LEAP Tsukuba JapanShow Abstract
Nonvolatile programmable-logic array using a complementary atom switch (CAS) has been demonstrated on a 65-nm-node test chip. The CAS consists of two two-terminal atom-switches connected in series with opposite direction. To achieve a high OFF-state reliability, the programming voltage is required to be high for conventional two-terminal switch. The CAS improves the OFF-state reliability while reducing the programming voltage. Since two-terminal atom switch has a bipolar current-voltage characteristics, either of two switches in CAS is highly durable against a stress voltage biasing during OFF-state. Each switch element is sequentially programmed by applying a voltage between two terminals.
The function block in CAS-based programmable logic array consists of two 4-input LUTs (look-up tables) and flip-flops. The cell has two routing wire segments of length 2 for each direction, and 19x16 crossbar switch is used for connecting between the function block and wire segment. Totally, 368-b CAS per cell was used for the crossbar switch and also data memory of LUT. Various logics were realized by synthesizing RTL codes and mapping the configurations into CAS-based programmable cell array. The configuration data was obtained from arbitrary RTL description utilizing in-house cluster packing and placement/routing tool chain. 2-bit full adder and 4-bit synchronous counter were synthesized and configured. The expected pattern was generated from the test-bench code in RTL source and the correct output pattern was successfully confirmed by comparing to expected pattern. We also confirmed that the programmed bits in the crossbar and the LUT were in ON-state without write disturb, whereas the all CAS have high resistive state in the initial state.
CAS is a promising candidate to realize a nonvolatile programmable logic with low power consumption and high performance. Dynamic power is critical issue for the conventional programmable logic. The CAS, which has a low input capacitance and small footprint, has reduced the dynamic power.
This work is supported by the Ministry of Economy, Trade and Industry (METI) and New Energy and Industrial Technology Development Organization (NEDO) in Japan. A part of the device processing was operated by Innovation Center for Advanced Nanodevices (ICAN), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
5:00 AM - DD4.02
Pattern Classification by Memristive Crossbar Circuits with Ex-situ and In-situ Training
Fabien Alibart 1 2 Elham Zamanidoost 2 Dmitri B Strukov 2
1IEMN-CNRS Villeneuve d'ascq France2UCSB Santa Barbara USAShow Abstract
The development of artificial neural networks (ANNs) based on emerging non-volatile memory, such as metal oxide memristors, has attracted an increasing interest recently. In the simplest form of such ANNs, the neurons are implemented with conventional (complementary metal-oxide-semiconductor) technology and interconnected by memristors functioning as artificial synapses. While there are number of recent proof-of-concept demonstration for synaptic operation by single memristive devices, demonstration of even simple functionality memristor-based ANN remains challenging and have yet to be reported. Here, we demonstrate pattern classification by a single-layer perceptron network implemented with hybrid crossbar circuits. 20 synaptic weights, which are realized by Pt/TiO2-x/Pt memristive devices with sub-20-nm-scale active region are successfully trained by ex-situ and in-situ method. In the first case, the appropriate conductance of each memristor is calculated on the precursor software-based network and then imported sequentially to the crossbar circuits using variation-tolerant programming algorithm. In the second case, the weights are adjusted in parallel following perceptron learning rule by applying voltage pulses from pre-synaptic and post-synaptic neurons. Both ex-situ and in-situ methods work satisfactory despite significant variations in switching behavior of memristive devices as well as half-select and leakage problems in crossbar circuits. The demonstrated results give hope for much anticipated efficient implementation of ANNs and pave the way towards extremely dense and high performance information processing systems.
5:15 AM - DD4.03
Byung Joon Choi 1 Antonio C. Torrezan 1 Douglas A. A. Ohlberg 1 John Paul Strachan 1 Min-Xian Zhang 1 Jianhua Joshua Yang 1 Dick Henze 1 R. Stanley Williams 1
1Hewlett Packard Labs Palo Alto USAShow Abstract
Reversible memristive switching phenomena have been extensively studied by many groups in a variety of materials systems for possible applications including nonvolatile memory, logic circuits and neuromorphic computing. Almost all of the anion-based resistive switching materials reported so far have been insulating/semiconducting metal oxides because of the wide range of their electrical properties and their exquisite dependence on doping concentrations. However, non-oxide ionic insulators/semiconductors that may also exhibit memristive switching behavior can be made from a much larger material pool that, with the exception of the chalcogenides, has not been extensively explored. Obvious examples are semiconducting nitrides, which have been intensively studied for photonics applications but not much for memristive phenomena.
Here, we demonstrate resistive switching in nitride memristors in a manner similar to the oxides. The switching material is an AlN film, deposited by plasma enhanced atomic layer deposition, and the electrodes can be TiN, Pt or Al. The Al-N system has a very simple phase diagram, which is considered to contribute to the high switching endurance displayed by the Ta-O and Hf-O oxides that posses similar phase diagrams. A variety of materials characterizations were performed to determine the structure, composition and impurities of the AlN films and ensure that the observed switching did not arise from inadvertent oxide contamination and to shed light on the mechanism of nitride switching. We have been successfully measured ultra-high switching speed in these nitride memristors, where voltage pulse of sub- 100 ps duration switches the AlN memristor ON and OFF with opposite voltage polarities. The scalability of nitride memristors is demonstrated at 50nm scale. Detailed switching mechanisms will be discussed. The demonstration of ionic switching behavior in nitrides could open up an entirely new area in resistance switches with significant opportunities.
5:30 AM - DD4.04
Direct Observation of Joule-heating-driven Switching in VO2 Mott Memristors
Suhas Kumar 1 2 Matthew D Pickett 1 John Paul Strachan 1 Gary Gibson 1 Yoshio Nishi 2 R. Stanley Williams 1
1HP Labs Palo Alto USA2Stanford University Palo Alto USAShow Abstract
In several correlated-electron materials, there are microscopic interactions among degrees of freedom including lattice, charge, orbital and spin, which show up as phase transition through various external stimuli. VO2, in particular, undergoes a first order Mott transition at about 340K because of both, on-site and lattice Coulomb repulsion, accompanied by a Peierls structural phase transformation from a monoclinic insulator to a half filled rutile metal. The transformation has been shown to be driven by temperature, pressure or strain on the lattice, charge induction and optical excitation; while the transition temperature can be controlled by doping, electric field and post annealing. A Mott memristor is a two terminal device in which such a Mott transition material is interposed between two metallic electrodes and is distinguished by its volatile switching behavior. Mott memristors have gained interest recently because of applications in computing and non-volatile memory including the neuristor: an electronic analog of an axon used to provide a lossless signal transmission and universal computation.
In electrical devices made of VO2 there have been many efforts to distinguish the contributions of Joule heating and electric field to drive the switching and to distinguish the occurrences of the electrical switching and structural transition. There have been several reports in recent literature on the switching being driven predominantly by electric field, and not Joule heating, when the field is in the order of 10^5 - 10^6 V/m, using a wide range of indirect evidence. Here, we show direct evidence to the contrary in planar devices of similar geometry, where we observe switching driven exclusively by Joule heating and eliminate all effects of electric field in switching for electric fields in an identical range. This is achieved by imaging the blackbody emission from the devices throughout the switching process and by studying the temperature-dependent current-voltage characteristics. We quantitatively reproduce these results with numerical finite-element simulations that accounts for Joule-heating.
We study the associated Peierls transformation in the crystal structure with in-situ X-ray absorption spectroscopy and Scanning Transmission X-ray Microscopy. Using these, we show filamentary structural transformation coincident with the localized Joule-heating-driven temperature observed with blackbody emission mapping. We also observe a hysteresis in the structural transition with temperature, on a uniformly heated film, and correlate it to the resistance-temperature data.
5:45 AM - DD4.05
State Dynamics and Modeling of Tantalum Oxide Memristors
John Paul Strachan 1 Antonio Torrezan 1 Matthew Pickett 1 J. Joshua Yang 1 R. Stanley Williams 1
1HP Labs Palo Alto USAShow Abstract
Among the resistance switching materials studied so far, tantalum oxide—when grown in the proper materials stack, composition, and structure—shows favorable characteristics from the standpoint of technological use. Several research groups have studied this system and reported demonstrations of high endurance, high speed with low energy switching, multi-level analog states, threshold switching to reduce sneak paths in crossbars, and long retention time. Meanwhile, our physical characterization of these devices showed the development of localized conductance channels, within which the switching material remains amorphous, but undergoes modifications of the Ta:O ratio . We have showed  that the transport in the films can vary from metallic to variable range hopping to insulating as the oxygen percentage increases, and have argued that this provides the state variable and operating principle for tantalum oxide devices.
Leveraging the microphysical picture, we developed a compact, predictive (SPICE) model for the electrical behavior and response of the devices. To derive this, we performed an ensemble of switching measurements, including time dynamics across nine decades in order to deduce the underlying state equations describing the switching in Pt/TaOx/Ta memristors. Compact equations were found which provided good agreement to the measured data across several devices studied. The resulting model, while being predominantly phenomenological, nonetheless adds some insight into the underlying physical processes in operation during the switching, and shows an interplay between voltage (field) and heating (power) which is asymmetric for ON versus OFF switching. Finally, the implications for read and write circuitry is evaluated in light of the model, and the expected trajectory for performance in terms of switching times and energy consumption is also discussed.
 F. Miao, et al., Adv. Mater. 23, 5633 (2011).
 I. Goldfarb, et al., Appl. Phys. A 107, 1 (2012).
DD5: Poster Session: Flash and Organic Memories
Tuesday PM, April 02, 2013
Marriott Marquis, Yerba Buena Level, Salons 7-8-9
9:00 AM - DD5.01
Nonvolatile Memory MOS Capacitors Made of CdSe Embedded ZrHfO High-k Gate Dielectric
Chi-Chou Lin 1 Yue Kuo 1
1TAMU CollegeStation USAShow Abstract
Compared with the un-doped HfO2, the Zr-doped HfO2 (ZrHfO) is a more suitable
high-k gate dielectric material for the nano-size MOSFET because of its lower equivalent oxide thickness, lower interface state density, and higher amorphous to crystalline transition temperature . The ZrHfO high-k film can also replace the SiO2 as the tunnel and control oxide layers in the nonvolatile memory devices because of the above advantages. CdSe, which is a n-type semiconductor, can be embedded into the ZrHfO dielectric as the charge trapping medium because of its large work function, i.e., 4.8 to 5 eV . In this paper, the CdSe embedded ZrHfO MOS capacitors were prepared on the p-type Si wafer using the one pumpdown sputtering process followed by the 800C post deposition annealing step. The crystalline CdSe in the sample was confirmed from the XPS spectrum, i.e., Cd 3d5/2 at BE 405.1 eV, Cd 3d3/2 at BE 411.9 eV, and Se 3d at BE 53.7 eV . The nonvolatile memory characteristics were demonstrated from the C-V and J-V hysteresis curves. When the gate voltage was sweep range of -6V to +6V to -6V, a large flat band voltage of 0.96 V was obtained while a small value of 0.04 V was detected in the control sample, i.e., ZrHfO without the embedded CdSe. Both electrons and holes could be trapped by the embedded CdSe site depending on the polarity of the stress voltage. The J-V curve showed two peaks corresponding to the flat band voltage location and the Coulomb blockade phenomenon . The control sample did not show these two peaks. More than 56% of the trapped charges were retained after 10 years at room temperature. A detailed study on the charge location and the temperature effect on the retention characteristics will be included in this paper. In summary, the CdSe embedded ZrHfO film can trap a large number of charges and retain them for a long period, which makes it a suitable gate dielectric material for the nonvolatile memory device.
This research was supported by NSF CMMI 0926379 project.
1. J. Yan, Y. Kuo, and J. Lu, Electrochem. Solid-State Lett., 10, H8199 (2007).
2. N. I. Dovgoshei, M. V. Shtilikha, and D. V. Chepur, Izvestiya VUZ. Fizika, vol. 11, p. 132, 1968.
3. X. S. Peng, J. Zhang, X. F. Wang, Y. W. Wang, L. X. Zhao, G. W. Meng, L. D. Zhang, Chem. Phys. Lett. vol. 343 p. 470, 2001.
4. Xi Liu, C. H. Yang, Y. Kuo, and T. Yuan, Electrochem. Solid-State Lett., 15, H1 (2012).
9:00 AM - DD5.02
Charge Transport Behavior in Pt-Fe2O3 Core-shell Nanoparticle Attached ZnO Nanowires for Nonvolatile Memory Device Application
Seung Chang Lee 1 Quanli Hu 2 Jin-Yong Lee 1 Chi Jung Kang 3 Tae-Sik Yoon 1 2
1Myongji University Yongin Republic of Korea2Myongji University Yongin Republic of Korea3Myongji University Yongin Republic of KoreaShow Abstract
The charge transport behavior in ZnO nanowires (NWs) with Pt-Fe2O3 core-shell nanoparticles (NPs) was investigated. The ZnO NWs with the diameter of ~30 nm and the length of ~5 µm were synthesized via a template-less and surfactant free hydrothermal method. The Pt-Fe2O3 core-shell NPs were chemical synthesized through the preferential oxidation of Fe and subsequent piled-up of Pt into the core in the colloidal solution. The NPs have a diameter of ~ 15 nm with the core of ~3 nm. The NPs were attached on the ZnO NWs by repeating dip-coating processes during which the NPs adsorbed on the NWs&’ surface through van der Waals interaction. The charge transport behavior was examined in metal/NPs-attached NWs/metal and thin film transistor structures with NWs channel, where the conductivity of NWs changes due to the presence of NPs through the effects of electrical charging, local resistance change, and so on. In this presentation, the detailed electrical charge transport behaviors in NPs-attached ZnO NWs and the potential application to nonvolatile memory devices will be discussed.
9:00 AM - DD5.03
Multi-bit Operation in Non Volatile Memory Devices Using Controlled Charging Behavior for Double Layer Floating Gate Devices
Balavinayagam Ramalingam 1 Haisheng Zheng 1 Shubhra Gangopadhyay 1
1University of Missouri Columbia USAShow Abstract
Multi-bit operation in Non-Volatile Memory (NVM) Metal Oxide Semiconductor capacitors (MOSCAP) is feasible by controlled charging of multiple Floating Gates with defined Gate voltage bias ranges. We demonstrated controlled charging over double layer Pt nanoparticle (NP) floating gate devices resulting in a multi-step programming. Pt NPs were fabricated using a unique tilted target sputter deposition method where the incident inflight metal atom density is varied by changing the target angle of the sputtering system. Due to this change in inflight metal atom density, the thermalization effects are modified to get a wide range of control over the size and inter-particle distance of the Pt NPs with a near homogenous size distribution. Two layers of this ultra-fine Pt NP with different size configurations in the sub-2 nm regime were sandwiched between different thicknesses of Al2O3 tunneling and separation layer. Optimum size and inter-particle distance of Pt NP were varied control the self-capacitance of the NP and their associated Coulomb charging energy. The tunneling and separation layer thicknesses were also varied to controllably tunnel electrons out from the first Pt NP layer to the second Pt NP layer demonstrating a highly controllable and efficient charging phenomenon. The best configuration of controlled charging behavior and observation of multi-step programming effect in the memory window was attained for devices with 3 nm Al2O3 tunneling, 0.54 ± 0.16 nm Pt NP with 4.65 ± 2.09 nm inter-particle distance (first layer Pt NP), 3 nm Al2O3 separation and 1.08 ± 0.22 nm Pt NP with 2.75 ± 1.05 nm inter-particle distance (second layer Pt NP). For this configuration, the memory window saturated for the first Pt NP layer over a programming bias range of 7 V to 14 V. Beyond 14 V the second Pt NP layer starts charging accounting for an increase in memory window exhibiting a multi-step memory window. We also demonstrated reliable charge retention properties for these devices in par with industry standards. This dependable and controllable layer-by-layer charging behavior suggests possible integration with CMOS based devices, may be even for the 25 nm transistor technology.
9:00 AM - DD5.04
Resistive Switching in Metal-nanowire/Polymer Nano-gap Devices
Rose M. Mutiso 1 James K. Kikkawa 2 Karen I. Winey 1
1University of Pennyslvania Philadelphia USA2University of Pennsylvania Philadelphia USAShow Abstract
Traditionally, bulk nanocomposites of electrically conducting particles and insulating polymers are categorized as either insulating or conducting when the nanoparticle concentration is below or above the percolation threshold, respectively. We recently presented the first examples of reversible resistive switching in bulk, glassy polymer nanocomposites.[1, 2] At compositions near the electrical percolation threshold, silver nanowire-polystyrene nanocomposites demonstrate reversible resistive switching upon increase voltage at room temperature. We proposed that resistive switching in these materials is the result of the field-induced formation of silver filaments that bridge adjacent nanowire clusters, extending the percolation network and decreasing the sample's bulk resistivity. This hypothesis is further supported by our temperature-dependent studies wherein the filaments persist below 100K. In order to further understand the resistive switching mechanism in these systems and explore possible applications, we have designed and fabricated single-gap nanowire devices comprised of lithographically-defined metal lines separated by polymer-filled nano-gaps. Using these devices, the complexity of the bulk device is significantly reduced as the switching mechanism between a single polymer-mediated metal-nanowire junction is isolated. Moreover, the sample geometry enables imaging. We have successfully demonstrated reversible resistive switching in our nano-gap Ag/PS devices when the gap size is 20 - 100nm, observing highly reversible switching behaviors in some samples with high on/off ratios (>10^3) for over 50 cycles. These preliminary results demonstrate that the resistive switching observed in our bulk Ag nanowire/polystyrene nanocomposites is achieved in a single isolated nanowire-nanowire polymer mediated junction. In addition, preliminary ex-situ high resolution imaging of the devices shows significant gap remodeling after a switching event, implying that the switching mechanism is linked to some form of electromigration of Ag electrodes. This finding is consistent with the filamentary conduction hypothesis proposed in the bulk case. Additional ex- and in-situ characterization studies to elucidate observed trends in the nano-gap devices are in progress.
 White, S. I.; Vora, P. M.; Kikkawa, J. M.; Fischer, J. E.; Winey, K. I. Advanced Functional Materials. 2011, 21,233-240.
 White, S. I.; Vora, P. M.; Kikkawa, J. M.; Fischer, J. E.; Winey, K. I. Journal of Physical Chemistry C. 2010, 114, 22106-22112.
9:00 AM - DD5.05
Low Voltage Memory Transistors with Gold Nanoparticles Embedded in Poly(methyl methacrylate) on Flexible Substrate
Ye Zhou 1 Su-Ting Han 1 A L Roy Vellaisamy 1
1City University of Hong Kong Hong Kong Hong KongShow Abstract
Organic field-effect transistor (OFET)-based memory is considered as promising candidate for realizing the ultimate goal of organic flash memory because of its nondestructive read-out, complementary integrated circuit architectural compatibility, and simple transistor realization. In this study, we demonstrate air-stable low voltage flexible nonvolatile memory transistors by embedding gold nanoparticles (Au NPs) in poly(methyl methacrylate) (PMMA) as charge storage element. The solution processability of the nanocomposite is suitable for low-cost large area processing on flexible substrates. The memory transistor exhibits a memory window of 2.1 V, long retention time with low operating voltage (le; 5 V). The memory behavior has been tuned via varying the composition of the fillers (Au NPs), which offers relatively easy processability for different flexible electronics application. The electrical properties of the memory devices are found to be stable under bending. These findings will be of value for low cost and low voltage advanced flexible electronics.
9:00 AM - DD5.06
Shining Light on Organic Memories: Influence of Photonic Excitation on Organic and Organic/Inorganic Hybrid Memory Devices
Sebastian Nau 1 Stefan Sax 1 Emil J. W. List 1 2
1NanoTecCenter Weiz Forschungsgesellschaft mbH Weiz Austria2Graz University of Technology Graz AustriaShow Abstract
During the last years, a big variety of memory concepts have been presented. Resistive switching based memory is doubtless one of the most promising emerging non-volatile memory technologies. In particular using organic semiconductors (OSC) as active memory material opens up the possibility for low-cost, large-scale and high-throughput fabrication processes such as ink-jet printing. Moreover, excellent performance parameters (on/off-ratios, cyclability and retention times) are already reported.
While for many OSC based devices, such as organic light emitting diodes (OLEDs) or organic photovoltaic devices (OPVs), the operation mechanism is well understood and the technology is on or even beyond the step to commercialization, there are still open questions in the field of resistive memory devices based on OSCs.
Apart from the most simple OSC memory device architecture - an electrode/OSC/electrode ‘sandwich&’ structure - also electrode/OSC nanoparticle blend/electrode and electrode/OSC/metal/OSC/electrode multilayer structures can be found in literature, mostly exhibiting similar current-voltage characteristics (i.e. unipolar resistance switching, N-shaped IV-curve with a broad region of negative differential resistance and the presence of a distinct threshold voltage).
The origin of the electrical bistability in this kind of assemblies is intensely debated in the community. Mechanisms like charging/de-charging of the embedded metal particles, charge transfers in donor-acceptor complexes and the formation/rupture of conducting filaments are currently under consideration to explain the switching behaviour.
In this contribution, we present a set of experimental results obtained for single layer, multilayer and blend devices, employing molecular n and p conducting materials and different metal nanoparticles. In particular, the response of the memory device to additional excitation with light of different intensities and wavelength was investigated and gives new insight into the working mechanism of the presented devices.
9:00 AM - DD5.09
WORM Memory Devices Using Poly (9-vinylcarbazole)
Aswin Suresh 1 Govind Ka 1 Manoj AG Namboothiry 1
1Indian Institute of Science Education and Research Thiruvananthapuram Thiruvananthapuram IndiaShow Abstract
Spin coated poly(N-vinylcarbazole) (PVK) sandwiched between thermal evaporated Aluminium electrodes on a glass substrate showed Write Once Read Many times (WORM) characteristics. The pristine devices were in the low resistance ON state exhibiting ohmic behavior and at a voltage near 2V, they switched abruptly to the high resistance OFF state showing space charge limited current (SCLC) with shallow traps. We suggest that the rupturing of metallic filaments due to Joule heating may explain the effect. The ON/OFF ratio was 108 and the states endured for 1000s, demonstrating the possibility of high performance, low cost WORM memory devices using PVK.
9:00 AM - DD5.10
Non-volatile Hybrid Memory Elements Based on Metal Nanoparticles and Organic Semiconductor Materials: Device Performance and Structural Properties
Giulia Casula 1 Piero Cosseddu 1 Jiri Novak 2 Frank Schreiber 2 Yan Busby 3 Jean-Jacques Pireaux 3 Annalisa Bonfiglio 1 Piero Cosseddu 1 Annalisa Bonfiglio 1
1University of Cagliari Cagliari Italy2Universitaet Tuebingen Tuebingen Germany3University of Namur Namur BelgiumShow Abstract
In recent years, fabrication of non-volatile memory devices using a combination of inorganic/organic materials has attracted a great deal of interest in the scientific community. Among different possible structures, resistive memories are particularly promising and interesting, thanks to some advantages such as low operation voltages and simple processing.
In this work, the performance of hybrid organic/inorganic resistive non-volatile memories prepared using various methods and materials have been investigated. Each memory element is a two-terminal structure, obtained by sandwiching a metal nanoparticles (NPs) interlayer between two organic semiconductor layers. The two semiconductor layers are contacted by means of two metal electrodes. Different material combinations were tested. In particular, electrodes were fabricated using inorganic materials like aluminum, gold or ITO. Two different types of organic semiconductors, such as N1400 (Polyera, deposited both by vapor or liquid phase) and Poly(N-vinylcarbazole) (PVK) (deposited by liquid phase), were tested. Finally, different metals, as gold and aluminum, were employed for defining NPs layer in the sandwiched structures. In particular, various growth rates were tested for NPs deposition.
Interestingly, all the tested configurations showed a bistable behavior: the devices typically start from a high resistive state and can be switched to a low resistive state by applying a proper switching voltage that generally ranges between 2.5 and 3.5 V. On/off current ratios in the range of 10^2 (recorded at 1 V), with typical retention times ranging from 10^4 to 10^5 seconds, were obtained.
Moreover, for understanding the conduction mechanisms of the devices, their electrical performances were related to the material morphology, structural and chemical properties. In particular, the metal NPs interlayer was characterized by High Resolution X-ray Photoemission Spectroscopy (HR-XPS), which allowed determining the metal content, studying the metal-organic interface and characterizing the metal NPs oxidation shell. HR-XPS depth profiling was also applied to characterize the NPs diffusion and cycling effects in the memory elements. The structure of the organic film, the metal clusters layer, and the thin films morphology were studied by X-ray specular reflectivity (XSR), Grazing Incidence Small Angle Scattering (GISAXS), and Atomic Force Microscopic (AFM). For Al NPs, with Al layer nominal thickness 15 nm, average cluster-to-cluster distances of 80 nm, independent on the Al growth rate, were observed. The size and distance of Al clusters film is mainly determined by the morphology of the underlying organic layer. The relationship between the memory elements performances and the detailed morphological/structural properties of the active layer will be provided.
DD1: Advanced Flash
Tuesday AM, April 02, 2013
Moscone West, Level 3, Room 3008
9:30 AM - *DD1.01
Metrics for Emerging Memories
Kirk Prall 1
1Micron Technology Boise USAShow Abstract
This paper will contain a short review of NAND and DRAM scaling limitations. It will examine the technical and economic capabilities that an emerging memory must achieve to displace mainstream memories. The major focus of the paper will be to development technical metrics that can be used to benchmark emerging memories. Multiple metrics will be developed across several technical categories including: scaling, energy density, number of particles, noise, etc. The relationships between the metrics will be examined. NAND will be used as a case study for these metrics. The metrics will be used to attempt to compare the major emerging memories including RRAM, CBRAM, STRAM, Ferroelectrics, phase change, etc. The paper will conclude with a prognosis on the suitability of the majors emerging memories for future mainstream applications.
10:00 AM - DD1.02
Dielectric Breakdown-induced Nanostructural Defects Evidenced by Transmission Electron Microscopy in Silicon Nanocrystal Memories
Emilie Faivre 1 2 Vincenzo Della Marca 1 2 Damien Deleruyelle 1 Roxane Llido 2 3 Lahouari Fares 2 Magali Putero 1 Jean-Luc Ogier 2 Philippe Boivin 2 Christophe Muller 1
1IM2NP Marseille France2STMicroelectronics Rousset France3IMS Talence FranceShow Abstract
Reliability issues appear even more predominant with the downsizing of critical dimensions of non-volatile memory (NVM) devices relying on charge storage. NVM integrating a “nanofloating” gate in the form of semiconducting nanocrystals is considered as an emerging solution which consists in embedding Si nanocrystals within SiO2 matrix: the Si nanodots are thus used as discrete traps for injected charges in replacement of the continuous polycrystalline Si floating gate. This charge trapping into individual dots limits the leakage current through defects created within the tunnel oxide beneath Si nanodots. However, despite a higher robustness against leakage, it is of primary importance apprehending the failure mechanisms of this discrete charge trap memories and uncovering the origin of nanoscale defects responsible for electrical degradation.
The aim of this study is to establish correlations between the stress-induced failure and the nanostructural defects at the origin of the local electrical breakdown. To reach this goal the experimental protocol (including accurate defect localization, FIB cutting and TEM observation) successfully developed on standard EEPROM memories was deployed on Si-nanodots capacitors. A peculiar attention was turned toward the removal of artifacts induced by ions and electrons used for FIB preparation and TEM observation. Besides, the protocol was carefully optimized for enabling TEM over the area potentially degraded during the electrical stress.
Encouraging results were obtained on two different sets of samples: either Si-nanodots memory cells or Si-dots grown on blanket substrate (Si-nanodots/oxide/Si substrate stack). On Si-nanodot memory cells, constant current stress was first applied to determine the breakdown voltage (VBD); the devices were then stressed under a constant voltage stress close to VBD. After an EMMI location of defects, thin lamellas were cut by FIB and observed by TEM. On the other hand, for Si-nanodots/oxide/Si substrate stack, localized breakdown was achieved by using a Conductive-AFM tip as already demonstrated on thin oxide layers: a bias voltage (+10 V) was applied to the substrate (grounded tip) to induce local electrical breakdown with a subsequent formation of hillocks observed by topographic AFM. Thanks to an accurate location of damaged area, an iterative method (progressive FIB thinning / TEM observation) was applied to uncover the origin of defects generated at nanoscale during the electrical stress.
The generation of nanostructural defects is shown to be linked to the nature of applied electrical stresses and compared to those evidenced in either thin oxide layers or EEPROM devices. Finally, this study brings to light the dielectric breakdown in silicon nanocrystal NVM and gives a better understanding of failure mechanisms.
10:15 AM - DD1.03
Piezotronic Nanowire Based Resistive Switches as Programmable Nanoelectromechanical Memories
Wenzhuo Wu 1 Zhong Lin Wang 1 2
1Georgia Institute of Technology Atlanta USA2Beijing Institute of Nanoenergy and Nanosystems, Chinese Academy of Sciences Beijing ChinaShow Abstract
The concept of complementing field effect transistors (FETs) with two-terminal hysteretic resistive switches has recently attracted a great interest in implementing and scaling novel nonvolatile resistive memories for ultrahigh density memory storage and logic applications. Notably, previous existing non-volatile resistive memories are all based on electrically switchable resistance change in various oxides and ionic conductors. These devices are electrically programmed and they are not suitable for direct interfacing with actuation/triggering other than electrical inputs. For applications such as human-computer interfacing, sensing/actuating in nanorobotics, and smart MEMS/NEMS, a direct interfacing of electronics with mechanical actions is required. Here we present the first piezoelectrically-modulated resistive switching device based on piezotronic ZnO nanowire (NW), through which the write/read access of the memory cell is programmed via electromechanical modulation. Adjusted by the strain-induced polarization charges created at the semiconductor/metal interface under externally applied deformation by the piezoelectric effect, the resistive switching characteristics of the cell can be modulated in a controlled manner, and the logic levels of the strain stored in the cell can be recorded and read out, which has the potential for integrating with NEMS technology to achieve micro/nano-systems capable for intelligent and self-sufficient multi-dimensional operations.
10:30 AM - *DD1.04
1T-1R Architecture with Fully CMOS-compatible RRAM Cell to Realize 4F2 Footprint for High Density Nonvolatile Memory Application
Zheng Fang 1 Xinpeng Wang 1 Zhixian Chen 1 Aashit Kamath 1 Guo-Qiang Lo 1 Dim-Lee Kwong 1 Kah Wee Ang 1
1Institute of Microelectronics Singapore SingaporeShow Abstract
Resistive random access memory (RRAM) has been examined extensively as a promising candidate for next generation nonvolatile memory due to the scaling limitations facing Flash memory. Compared to conventional charge-trapping nonvolatile memory, RRAM device exhibits lower operation voltage and higher access speed; it also has advantages of low power consumption, superior data retention, high-density capacity and CMOS-compatibility.
In order to realize high density memory array, crosstalk between adjacent cells must be avoided. RRAM cell in one-transistor one-resistor (1T1R) configuration has been reported with planar transistor. However, the minimum cell size demonstrated for planar transistor structure is 6F2, where F stands for the minimum feature size. In 2010, RRAM cell integrated with three-dimensional (3D) vertical bipolar junction transistor (BJT) was demonstrated to have 4F2 footprint, although BJT has high leakage current and it may also increase process complexity if implemented along with CMOS logic circuit. A more direct method to achieve 4F2 cell size is to integrate RRAM cell with vertical nanopillar gate-all-around (GAA) transistor. Vertical nanopillar GAA transistor based on nanowire architecture has been demonstrated to be a viable candidate for 15nm and beyond technology nodes.
In this talk, we demonstrate the integration of vertical nanopillar GAA transistor with transition oxide based RRAM cell to achieve 4F2 footprint and systematically investigate 1T1R architecture in nanometer scale.
DD2: Organic Memories
Tuesday AM, April 02, 2013
Moscone West, Level 3, Room 3008
11:30 AM - *DD2.01
Filament Formation in Memory Devices Based on Thin Organic Films
Christopher Pearson 1 Leon Bowen 3 Myung-Won Lee 1 Alison L. Fisher 1 Katharine E. Linton 2 Martin R. Bryce 2 Michael C. Petty 1
1Durham University Durham United Kingdom2Durham University Durham United Kingdom3Durham University Durham United KingdomShow Abstract
Organic resistive memory structures are generally formed by interposing thin layers of organic molecules between two electrodes. The cross-point (or crossed-bar) architecture permits the closest packing of bit-cells, with each occupying an area of 4F2, where F is the minimum feature size (the line-width and spacing of the electrodes). A very wide range of organic materials that exhibit resistive switching has been reported. The film thicknesses are generally less than 1 mu;m and the phenomena are observed in different types of material (inorganic compounds, such as silicon dioxide and metal oxides, and organic compounds, such as polymers and charge-transfer complexes). Furthermore, the thin films have been formed using a variety of techniques (e.g. spin-coating, thermal evaporation). The only experimental parameter that is common to all the structures studied is the presence of metallic electrodes (e.g. Al) below and on top of the thin film.
Despite the impressive progress on developing the technology (e.g. 3-d structures), there is no agreement on how resistive thin film memories operate. Explanations generally fall into two distinct categories: (i) the injection and storage of charge in the thin film; and (ii) metallic filament formation. In previous work, we have reported on bistable switching phenomena in electroactive organic compounds based on ambipolar compounds, containing both electron and hole transporting groups [1,2]. Here, we review the published experimental data on organic resistive memories and report switching and negative differential resistance phenomena in a new ambipolar compound. Cross-sections of the devices have been imaged by electron microscopy both before and after applying a voltage. The micrographs indicate the growth of filaments, with diameters of 50 - 100 nm, on the metal cathode. We propose that the filaments are formed by the drift of aluminium ions from the anode that these are responsible for the observed switching and negative resistance phenomena in the memory devices.
1 C. Pearson, J. H. Ahn, M. F. Mabrook, D. A. Zeze, M. C. Petty, K. T. Kamtekar, C. Wang, M. R. Bryce, P. Dimitrakis, D. Tsoukalas, Appl. Phys. Lett., 2007, 91, 123506.
2 P. Dimitrakis, P. Normand, D. Tsoukalas, C. Pearson, J. H. Ahn, M. F. Mabrook, D. Zeze, M. C. Petty, K. T. Kamtekar, C. Wang, M. R. Bryce, M. Green, J. Appl. Phys., 2008, 104, 044510.
12:00 PM - DD2.02
Organic Thin-film Memory Transistors Based on C60 Charge Storage Units in Dielectric Monolayers
Artoem Khassanov 1 Alexei Vorobiev 2 Thomas Schmaltz 1 Andreas Hirsch 3 Marcus Halik 1
1Friedrich-Alexander-University Erlangen-Nuremberg Erlangen Germany2European Synchrotron Radiation Facility Grenoble France3Friedrich-Alexander-University Erlangen-Nuremberg Erlangen GermanyShow Abstract
Self-assembled monolayers (SAMs) such as silanes, carboxylic acids (CAs) or phosphonic acids (PAs) provide a wide range of applications in the field of organic electronics and are well established as insulators in hybrid organic-inorganic dielectrics of low voltage organic thin film transistors (OTFTs) . Organic thin film memory transistors (OTFMTs) with the possibility to operate as switch and non-volatile memory device at the same time bear another potential application. Integration of additional layers such as floating gates  or incorporation of nanoparticles acting as charge traps enable the control of hysteresis and consequently two different conducting states at a certain gate-source voltage (VGS).
Our approach for the fabrication of OTFMTs without adding further layers for charge storage is the use of a functional hybrid dielectric of O2-plasma fabricated AlOx and a mixed SAM consisting of alkyl-PAs and C60 functionalized PAs that are known to be excellent electron acceptors and thus acting as charge traps to enable the memory effect. The deposition of the redox active C60-PAs is performed simultaneously with the insulating alkyl-PAs from mixed (SAM) solutions via self-assembly. Several ratios of C60-PA to n-alkyl-PA were chosen for the preparation of mixed SAMs. The position of embedded C60 moieties in the monolayer was investigated by means of X-ray reflectivity measurements (ID10, ESRF, Grenoble, France). In order to compare the charge retention and the memory ratio of OTFMTs depending on the distance of C60 moieties to the organic semiconductor in the stack, various chain lengths of insulating n-alkyl-PAs were chosen. In particular embedding of C60-PAs between long chained n-alkyl-PAs has shown to be a successful way to ensure an increased isolation of the C60 moieties by the longer alkyl-PAs and to decrease charge leakage. These devices exhibited improved retention times to OTFMTs with non-isolated C60 moieties.
For further investigation of the leakage behavior α,α'-dialkyl-oligothiophene semiconductor materials with different side chain lengths were used to modify the distance to C60 functional groups of the hybrid dielectric.
XRR provided information about the molecular arrangement  and thereby led to an adaptation of device structure and improvement of device performance.
The results of this novel approach for OTFMTs with C60 charge storage units were significantly encouraged by X-ray reflectivity experiments and molecular dynamics simulations.
 a) Halik, M., Klauk, H. et al. (2004), Nature 431(7011): 963.
b) Klauk, H., Zschieschang, U. et al. (2007), Nature 445(7129): 745.
c) DiBenedetto, S. A., Facchetti, A. et al. (2009), Advanced Materials 21(14-15): 1407.
 Sekitani,T., Yokota, T., Zschieschang, U., Klauk, H. et al. (2009), Science 326 (5959), 1516
 Amin, A., Khassanov, A., Halik, M. et al. (2012) JACS 134 (40), 16548
12:15 PM - DD2.03
Electrical and Structural Properties of Nanoimprinted Ferroelectric Polymer Arrays for Non-volatile Memory Applications
Hailu Gebru Kassa 1 Laurianne Nougaret 1 Ronggang Cai 1 Alain M. Jonas 1
1Universitamp;#233; catholique de Louvain Louvain-la-Neuve BelgiumShow Abstract
Due to the presence of two stable polarization states, ferroelectric polymers are attractive for use in non-volatile random-access memories. These polarization states can be easily switched by the application of an electric field. Among ferroelectric polymer materials, poly(vinylidene fluoride) (PVDF) and its copolymers with trifluoroethylene (TrFE) are particularly attractive for nonvolatile memory applications due to their large polarization and excellent switching characteristics. Recently, we reported the use of nano-imprint lithography (NIL) to fabricate high-de