December 1-6, 2013 | BostonMeeting Chairs: Charles Black, Elisabetta Comini, Gitti Frey, Kristi Kiick, Loucas Tsakalakos
The high operative voltages and the low mobility of semiconductors are probably the most relevant problems that have affected so far organic electronics devices and have significantly limited their employment in practical applications.Many attempts of solving these problems have been done, aiming at a better performance of organic semiconductors. We believe that an as important route for achieving the final goal consists in improving the device architecture, aiming, at the same time, at a fabrication procedure able to be easily scaled up for industrial production.By combining an ultra-thin dielectric layer with a self-aligned architecture, Organic Thin-Film Transistors (OTFTs) with ultra-low operational voltages (<2 V) and a very high (100 kHz) cut frequency have been obtained, with a traditional, low mobility organic semiconductor as Pentacene. The devices are fabricated using a one-mask, photolithographic self-alignment technique that can be realized with standard photoresists and without further chemical treatments. This technique allows a dramatic reduction of the parasitic capacitances thus leading to a remarkable increase of the cut-off frequency, even with organic semiconductors with a relatively low mobility. In this contribution, the main electrical parameters of ultra-low voltage, self-aligned devices are reported, and a complete frequency characterization of the devices is given. These characteristics make the reported approach suitable for the development of basic circuitries for high frequency applications. In addition, optimized structures may be successfully employed for the realization of OTFT-based sensor devices, that also greatly benefit of the reduction of operating voltages and optimization of the frequency performances.
Getting away from oxide dielectrics in organic field-effect transistors (OFETs) is not only cost-effective but has tremendous advantages for improving carrier mobility and stability of devices. The charge carrier mobility in organic field-effect transistors OFETs can be enhanced by a few orders of magnitude by an appropriate choice of the dielectric-polymeric interface. Moreover, the polarity of solvents used for dissolving the dielectric material also plays a large role in enhancing charge carrier mobility and improving the transport characteristics. We demonstrate low-operating voltage, high mobility, and stable OFETs using both non-polar and polar polymeric dielectrics such as poly(4-vinyl phenol) (PVP), poly methyl metacrylate (PMMA), and polyvinylidene fluoride-trifluoroethylene (PVDF-TrFe), dissolved in solvents of high dipole moment. High dipole moment solvents such as propylene carbonate and dimethyl sulfoxide used for dissolving the polymer dielectric enhance the charge carrier mobilities by three orders of magnitude in pentacene OFETs compared to low dipole moment solvents. Fast switching circuits with patterned gate PVP-based pentacene OFETs demonstrated a switching frequency of 75 kHz at low input voltages. The frequency response of the OFETs is attributed to a high degree of dipolar-order in dielectric films obtained from high-polarity solvents and the resulting energetically ordered landscape for transport. Remarkably, these pentacene-based OFETs exhibited high stability under bias stress and in air with negligible shifts in the threshold voltage. Our results pave the way for high performance easily fabricated OFETs on flexible substrates, thus opening up a range of applications in real time fast organic logic circuits for radio frequency identity tags and e-paper applications.
In recently years, there has been great interest in the use of high-speed printing for manufacturing flexible electronic systems such as RFID tags, sensors and displays. In this work, we demonstrate a gravure printing-based fabrication process to realize high performance printed thin film transistors (TFTs) and discuss the challenges associated therewith. To improve device performance, the channel length and line width need to be scaled significantly. Recently, we demonstrated that direct gravure can print very fine features on flexible substrates. However, the alignment requirement for such features is very challenging, particularly at high printing speeds. Therefore, we introduce a fully overlapped source/drain structure with high-resolution source/drain lines, since this structure reduces parasitic capacitance while simultaneously relaxing layer-to-layer registration requirements. To enable this, the formation of printed lines using gravure printing is explained based on surface energy minimization and the impact of cell spacing is discussed. Because the printed volume is an important factor for line formation, we demonstrate that the printing speed can control the printed volume precisely. As a results of this understanding, linewidths below 10mu;m can be achieved consistently. Next, the printed lines are characterized in term of line edge roughness (LER) and line width roughness (LWR). The results reveal that the LER and LWR are independent of cell sizes and gaps and possible sources of LER and LWR are suggested. Finally, by optimizing deposition and annealing conditions for each layer, we realize optimized devices with saturation mobility of ~0.6cm2/Vsec and Imax/Imin of ~ 2E3. These represent some of the highest performance fully printed organic TFTs reported to date.
Organic thin-film transistors (OTFTs) are the most promising candidates for flexible electronics due to their flexible structures, simple ability to process large area displays, and excellent compatibility with flexible substrates . To date, many studies have been reported that have aimed at developing a wide range of plastic electronics such as flexible displays, sensors, etc. In this talk, we will discuss the recent work, focusing on OTFT arrays and its application to flexible display. Active-matrix (AM) backplane using low-temperature cross-linkable olefin-type polymer as the gate insulator (GI) and air-stable DNTT as the organic semiconductor was successfully fabricated on a plastic substrate. The short channel TFT array exhibited a high hole mobility over 0.5 cm2/Vs, a low subthreshold slope of 0.31, and excellent environmental and operational stability. 5-inch flexible OLED display showed a high luminescence over 300 cd/m2 by driving of the DNTT-based OTFTs . Solution-processed OTFTs are also attracting considerable attention due to both their simple and facile manufacturing processes and excellent transistor performances. We present a simple patterning process of solution-processed OSC for developing a high mobility short channel TFT array . The OSC film was directly patterned on the confined active channel region by a simple lamination coating technique and the corresponding TFTs showed high mobility of up to 1.3 cm2/Vs. In the final section, we will demonstrate eco-friendly paper-based organic TFT array. Transparent cellulose nanofibers paper  was firstly applied to the flexible substrate for the TFT backplane. Solution-processed TFT exhibited high mobility exceeding 1 cm2/Vs, good air-stability, and an excellent mechanical stability. Y. Fujisaki et al., IEEE Trans. Electron Devices 59 (2012) 3442.  Y. Fujisaki et al., Appl. Phys. Lett. 102 (2013) 153305.  M. Nogi et al., Adv. Mater. 21 (2009) 1595.
Colloidal semiconducting nanoparticles and nanowires are interesting building blocks for large area and printable electronics. Solution-processability, potentially high mobilities and environmental stability compared to organic semiconductors are some of the possible advantages. However, the final device performances, for example, in field-effect transistors (FETs), often fall short of these high expectations. This may be due to intrinsic and extrinsic effects, such as large disorder, surface traps, injection barriers and inefficient planar gating. Few of these problems can be solved by using electrolyte-gating with ionic liquids or ionogels for nanowire FETs. The high capacitance (1-10 mu;F/cm2) of the electric double layer (EDL) that is formed evenly at the semiconductor- electrolyte interface under applied gate bias allows for the efficient injection of high charge carrier densities at very low voltages (<2 V). This is particularly useful for non-flat or porous semiconducting layers such as arrays and thin films of nanowires, because the EDL creates a uniform gating effect.We present several examples, in which electrolyte-gating is used to obtain high mobility field-effect transistors with semiconducting nanowires, which are not possible with traditional gating techniques These include ambipolar PbSe nanowire FETs, that are not limited by any Schottky barriers and therefore show intrinsic one-dimensional charge transport behavior, and FETs based on highly aligned ZnO nanorod films with orientation-dependent electron mobilities of up to 9 cm2V-1s-1. Finally, we developed a new ionogel based on microcellulose and tailored ionic liquids that enables fabrication of low-voltage, flexible ZnO nanorod FETs and simple circuits on paper.
Vertical field effect transistor is a new architecture for Organic transistor in which the channel length is determined by the semiconductor film thickness. Since creating thin layers is a trivial process in a vertical architecture, it is possible to build high performance devices in spite of the organic semiconductors&’ relative low mobility. Owing to the patterned source electrode architecture, the gate is able to induce an efficient potential barrier lowering between the source electrode and the semiconductor and, as will be presented, enables fast switching (sub 2us) and high current densities (3A/cm^2).Most of our results to date were based on the fabrication of the patterned electrode using di-block copolymer (polystyrene-block-polymethyl methacrylate) lithography that relies on its ability to self-assemble over cm scale areas. To extend the applicability of the structure to various material systems as well as to standard FAB lines we have developed a stepper photo-lithography process that can be applied to meter scale substrates as done in the display industry. We will show how judicious design of the electrode allows to optimize the device performance in terms of ON/OFF ratio and current levels. Using the ambipolar ActivInk N2200 [P(NDI2OD-T2)] by Polyera we demonstrate robust operation in a range of designs. The experimental data will be accompanied by results from 2D numerical simulations of the device highlighting the physics that underlines the structure property relation between the nano-patterned electrode and the device performance Moreover, simulations results predict a possible switching time of a few tens of nanosecond once parasitic capacitances are minimized.
In the early 80&’s ferroelectric PVDF was proposed as an ideal candidate for data storage applications as it exhibits a bistable, remnant, polarization that can repeatedly be switched by an electric field. However, fabrication of smooth ferroelectric PVDF thin films, as required for microelectronic applications, was a longstanding problem. Recently smooth neat PVDF films can be made at elevated substrate temperatures. Upon applying a short electrical pulse the ferroelectric polar δ-phase is formed. Due to its relatively high coercive field, polymer films should be fabricated as thin as possible to operate the devices at low voltage. Thin films should have a large crystallinity and effective crystal orientation to obtain high remanent polarization. Here we show that by carefully optimizing the processing procedure, ultra-thin ferroelectric δ-PVDF capacitors can be achieved with a programming voltage below 5 V. The possibility to produce ferroelectric, smooth δ-PVDF, and with the drastic reduction in film thickness, paves the way to fabricate FeFETs that have low programming voltage and an excellent data retention and programming cycle endurance.References  M.