Overcoming Mobility Limit in 2D Remote Side-Gate Hot-Carrier Transistors

The persistent challenge of low carrier mobility in layered two-dimensional (2D) semiconductors has limited their applicability in next-generation transistors. In this work, we introduce a state-of-the-art hot-carrier field-effect transistor (HC-FET) architecture that leverages a ferroelectric substrate and in-plane polarization to achieve unprecedented carrier mobility over 4700 cm²V^-1s^-1 and 0.1 mA/��m current density in monolayer MoS₂, outperforming traditional FETs. The experimental findings, supported by robust theoretical framework, reveal that the hot-carrier mechanism effectively accelerates carriers by mitigating scattering from phonons and charged impurities, leading to improvements in mobility, current density, and subthreshold-swing. Our work elucidates the fundamental interplay between dielectric screening, in-plane polarization, and carrier transport, presenting a transformative pathway for performance improvements in future 2D transistors. Moreover, the HC-FET design is versatile and applicable across various TMD materials, opening potential avenues for scalable, ultra-fast, energy-efficient electronics.