Controlling Thermal Transport in Electronics

Modern and next-generation electronic devices involve multiple chips within the same package. For instance, memory dies adjacent to or stacked with the central processing unit (CPU). The thermal limits of the two types of chips are quite different with memory generally having lower allowable temperatures to ensure reliable operation compared to the CPUs. One solution for ensuring maximum operational power of each device is to embed effective thermal insulation between these functional components. In other situations, a high heat transfer pathway is preferable to dissipate the heat effectively. This presentation will describe new metrology techniques developed to characterize the materials and interfaces within packages, as well as new materials such as aerogel-based for thermal isolation and graphene-foam based thermal switches. Ultimately, better control of the thermal pathways within heterogeneous packages enables higher performance and longer lifetimes for the components.