Comparison between Sapphire and GaN Substrates for 1.2kV Rated Vertical GaN Devices

Vertical GaN based power switching devices, diodes and transistors, are particularly desirable due to their reduced die size in comparison to lateral heterostructures-based devices. This results in a reduction of specific on-state resistance, <i>R</i>_DSon×A, by one order of magnitude down to 1.0mW cm². Also, vertical device concept allows for aggressive device scaling, in respect to gate periphery length per area, and enables high current densities per unit area. The targeted blocking capability of 1.2kV demands the growth of drift layers thicker than 10µm with low residual background doping. However, the drift region conductivity, in particular for thick <i>n</i>^--GaN drift layers, may be limited by low mobility, low carrier density, back ground compensating doping, high defect density and built-in potential barriers, having a direct impact on the device electrical performance. Previously, we provided an optimization procedure for designing the drift layer properties for a specific voltage rating, and it showed how for 1.2kV and higher it's necessary to increase the drift layer thickness above 5µm. However, growing thick GaN layers is especially challenging for foreign substrates where the lattice mismatch and thermal coefficient differences generate a series of undesirable effects, such as increase of threading dislocations density, increased leakage current, increased stiffness and fragility and increase in wafer bow. While GaN substrates may provide a better solution for the material quality point of view, costs and substrate quality may differ substantially between differently grown wafers. In this presentation we will talk about the issues of growing thick (&gt;5µm) GaN drift layer on Sapphire substrates for vertical high power GaN devices, how to manage the high wafer bow that makes these wafers un-processable on commercial equipment designed for flat Silicon wafers and we will compare the processed devices between sapphire and three differently grown GaN substrates (Ammonothermal-GaN from vendor 1, “Wafer A”, and HVPE-GaN from vendor 2, “Wafer B”, and vendor 3, “Wafer C”). All processed devices showed &gt;1.2kV breakdown voltage with different ON-state resistivity, Power-Figure-of-Merit and chip cost. <i>pn </i>diodes on Ammonothermal-GaN, “Wafer A”, show 1630V breakdown, on “wafer B” and “wafer C” 1485V and 1480V are shown respectively, all three showed avalanche breakdowns. While on sapphire, “Wafer D”, they show 1350V nondestructive breakdown due to high leakage current.<br/>The experiment starts with 4” sapphire substrateand 3× 2” GaN substrates. A total of 14µm thick GaN epitaxial layers are grown on each wafer, epitaxy consists of a 2.2µm un intentionally doped GaN buffer layer, a 2.4µm n⁺-GaN:Si (N_D = 3.0×10¹⁸cm^-3) lower highly conductive layer and a 10µm n-GaN:Si drift layer with a nominal Si concentration of N_D = 7.5×10¹⁵cm^-3. The effective doping has been measured by CV on diodes and changes based on the substrate material. A 500nm GaN:Mg 1×10¹⁹cm^-3 layer with additional 30nm GaN:Mg 2×10¹⁹cm^-3 contact layer are regrown and in-situ activated in a separate MOVPE reactor. The initial wafer bow after epitaxy grown on sapphire is ~300µm (Radius ~4m) and it would not be processable. Laser patterning is carried out in order to reduce the wafer bow by selectively introducing damage in the substrate close to the bottom interface. The patterning was realized by focusing a laser beam in the sapphire close to its back surface using a laser scriber (WSS4000), which uses a Talisker Ultra Laser from Coherent for internal layer modification. This means that the laser will be focused inside the material and, at this position, the crystal will be modified. The wavelength we use is 532nm. Used repetition rate is 40kHz at a feed speed of 400mm/s and a continuous laser power of 160mW at the point of use. Overall device performances and characteristics will be shown in the presentation, along with benchmarking and comparison of the different substrates.