Non-Epitaxial Growth of Single-Crystalline Two-Dimensional Transition Metal Dichalcogenides Below Back-End-of-Line Temperature Limit for Monolithic Three-Dimensional Integration

As modern silicon-based transistor is approaching its scaling limitation, monolithic three-dimensional (M3D) integration has recently been developed to continue Moore’s law. Even though M3D integration provides higher device density with more efficient heat management than conventional 3D integration by eliminating the need for the complex through-silicon-via process, its low thermal budget is the key limitation.<br/>Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDs), are considered as promising channel materials for M3D integration, because their processing temperature can be lower than the back-end-of-line (BEOL) temperature limit, typically below 400 °C, and their performance is not degraded at atomic thickness. However, M3D integration using 2D TMDs has heavily relied on the transfer process due to their high growth temperature. To avoid the transfer process, direct growth of TMDs on amorphous oxide-coated silicon substrates at low temperatures has been investigated, but achieving single-crystalline TMDs on an amorphous substrate is fundamentally challenging due to the absence of a crystalline substrate for epitaxial growth and the low growth temperature.<br/>Here, I demonstrate the growth of single-crystalline TMDs on amorphous oxide-coated silicon substrates below 400 °C by using confined-growth method, in which a-SiO₂ mask is patterned on an a-HfO₂-coated silicon substrate. Owing to the growth selectivity, single-domain TMDs selectively grow within the HfO₂ trench when the trench dimensions are optimized. Additionally, the dangling bonds at the edge and corner of the SiO₂ mask reduce the activation energy for nucleation, allowing for lower growth temperatures. To demonstrate M3D integration with direct growth, a vertical CMOS structure was fabricated. First, WSe₂ was grown using the confined-growth method, followed by pMOS fabrication. MoS₂ was then grown on top of the pMOS tier at a temperature below 400 °C, after which nMOS fabrication was completed. The results showed that the underlying pMOS tier was not degraded after the nMOS process. Furthermore, the devices exhibited excellent performance compared to previously reported TMD-based CMOS via transfer and direct growth, thanks to their single crystallinity.