Additive Solution-Based Process to Fabricate Metal Oxide FETs Enabled by Directed Fluidic Assembly

Semiconductor electronics miniaturization conventionally requires sophisticated and complex fabrication processes, which are typically conducted at high end semiconductor foundries at elevated price tags. Researchers nowadays work on incorporating new additive fabrication techniques to alleviate the overall fabrication cost of such devices. Semiconductors’ doping represents a fundamental challenge in this regard, particularly, controlling doping of impurities into intrinsic semiconductor materials down to nano-scale resolution. This doping process is conventionally conducted through complicated deposition and dry etching processes, which drastically increases the fabrication cost of such devices. Additive manufacturing, however, can be incorporated to replace some of these complicated techniques, which can provide similar results at much lower cost. Here, we report a novel, reliable, and cost-effective additive fabrication approach that allows controlled doping of n-type dopants into silicon substrates. This is achieved using two steps: first, additively coating of dopants from their liquid dispersions directly over chemically engineered Si substrates at micro- to nanoscale precision, using fast fluidic assembly technique (FFA). Second, diffusing the dopants inside the Si substrate using controlled rapid thermal annealing process (RTA). This novel approach facilitates injecting semiconductors with impurities down to micro scale resolution at designated locations. Time of flight ion mass spectroscopy (TOF-SIMS) was conducted to investigate the distribution of the dopants inside the Si bulk substrate. Moreover, by modeling the fabrication process using CAD tools, we were able to fine-tune the doping process to achieve optimum doping profile required for building miniaturized electronic components. The technique was demonstrated by fabricating metal oxide field effect transistors (MOSFETs) devices with outstanding performance. From the I-V characteristics, the devices showed an effective mobility (µeff) of ~320 cm²/V.s in the linear regime, and 300 cm² /V.s in the saturation regime. The transfer characteristics also revealed on/off ratio of ~ 10⁴ for devices with 10 µm channel length. Moreover, the drain current was negligible at zero gate voltage, which confirms that the fabricated MOSFETs are operating in enhancement mode as desired, and was further confirmed by TOF-SIMS measurements. We believe that this novel doping technique will pave the way as an alternative cost-effective method to fabricate miniaturized electronic devices on a large scale for semiconductor industry.