Enhanced Subthreshold Slope in Black Phosphorus-Tin Diselenide Heterostructure Tunneling Field-Effect Transistors

Heterostructures composed of ultrathin two-dimensional (2D) van der Waals (vdW) materials are gaining significant attention due to their potential applications in photonic devices, logic devices, and other advanced technologies. The absence of dangling bonds in 2D vdW materials eliminates the conventional lattice mismatch issue when they are integrated into heterostructure forms. This study compares the electrical performance of a tunneling field-effect transistor (TFET) incorporating a black phosphorus (BP) and tin diselenide (SnSe₂) heterostructure with that of a conventional BP-FET.<br/>The <i>I</i>_ds-<i>V</i>_ds curve of the BP-SnSe₂ device exhibits negative differential resistance (NDR) characteristics, demonstrating band-to-band tunneling (BTBT) operation as a TFET. This is facilitated by global bottom gate biasing, which enhances band alignment potential, promotes high carrier concentration in the SnSe₂ sheet, and allows for exclusive adjustment of the BP channel, simplifying device fabrication and operation. At room temperature, the BP-SnSe₂ TFET shows an improved subthreshold slope (SS) of approximately 6 V/dec compared to 13 V/dec for the BP FET. This reduction in SS is attributed to the minimization of charge injection caused by the Boltzmann tail in the TFET operation. Note that the SS values are higher than standard silicon devices due to the relatively thick gate dielectric (approximately 300 nm SiO₂) used in this study; further improvement in SS is expected by reducing the gate dielectric thickness.<br/>Additionally, temperature-dependent SS analysis indicates that the BP-SnSe₂ TFET exhibits lower SS values compared to the BP FET, with a more gradual decrease in SS upon cooling. This is also attributed to different charge transport mechanisms in the subthreshold regime between the devices. Furthermore, in low-temperature regions, SS saturation is observed, caused by band tail states.<br/>These results contribute to the development of TFET applications using 2D vdW material-based heterostructures and provide important insights for creating more reliable and efficient TFETs.