December 1 - 6, 2024
Boston, Massachusetts
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2024 MRS Fall Meeting & Exhibit
EL03.15.09

Electrical Double Layer Force Enabled CMOS-compatible Transfer of van der Waals Materials

When and Where

Dec 5, 2024
4:30pm - 4:45pm
Sheraton, Second Floor, Back Bay C

Presenter(s)

Co-Author(s)

Sheldon Zheng1,Jiangtao Wang1,Tianyi Zhang1,Jiadi Zhu1,Tong Dang1,Ang-Yu Lu1,Tilo Yang1,Peng Wu1,Xinyuan Zhang1,Kenan Zhang1,Kyung Yeol Ma1,Zhien Wang1,Vladimir Bulovic1,Tomas Palacios1,Jing Kong1

Massachusetts Institute of Technology1

Abstract

Sheldon Zheng1,Jiangtao Wang1,Tianyi Zhang1,Jiadi Zhu1,Tong Dang1,Ang-Yu Lu1,Tilo Yang1,Peng Wu1,Xinyuan Zhang1,Kenan Zhang1,Kyung Yeol Ma1,Zhien Wang1,Vladimir Bulovic1,Tomas Palacios1,Jing Kong1

Massachusetts Institute of Technology1
The integration and stacking of van der Waals (vdW) materials to target substrates or circuits is critical to their applications in high-end electronics, optics, moiré electronics, <i>etc</i>. Since high quality vdW materials are often grown with harsh conditions, the transfer of these vdW materials to target substrates is one of the key steps in the integration. However, the step of detaching nanomaterials from the growth substrate typically requires the use of either chemical etchants, electrochemical bubbling, or metal-assisted mechanical strain, which often leaves residue or introduces contamination, making the process CMOS-incompatible, low-yield and the quality of the vdW materials degraded. Furthermore, the substrate cannot be used again, adding significant cost to the manufacturing process (especially for single crystalline substrates). In this work, we present an electrical double layer (EDL) force enabled transfer method (termed as EFT, <u>E</u>DL <u>F</u>orce <u>T</u>ransfer) that is CMOS-compatible, with minimal damage to the vdW layer, widely applicable to different types of substrates and materials, and cost-effective. With the formation of the EDL, the vdW material is immediately repelled from the substrate by the strong EDL repulsion force. This method is suitable for various vdW materials (e.g., carbon nanotube, MoS<sub>2</sub>, h-BN, etc.) and substrates (e.g., oxide, nitride, etc.). The as-transferred vdW materials show ultra-high nanoscale cleanliness, along with minimized wrinkles, cracks, metal contaminations and other transfer-induced defects. The MoS<sub>2</sub> transistors fabricated with this transfer method show higher ON current and reduced threshold voltage variation than devices made via chemical etching transfer. This EFT approach offers a facile and manufacturing-viable solution for vdW material integration, which will significantly advance the future development of atomically thin electronics.

Keywords

2D materials | chemical vapor deposition (CVD) (deposition) | van der Waals

Symposium Organizers

Deji Akinwande, The University of Texas at Austin
Cinzia Casiraghi, University of Manchester
Carlo Grazianetti, CNR-IMM
Li Tao, Southeast University

Session Chairs

Carlo Grazianetti
Eric Pop
Li Tao
Oleg Yazyev

In this Session