Dec 2, 2024
10:30am - 11:00am
Hynes, Level 1, Room 104
Deep Jariwala1
University of Pennsylvania1
Silicon has been the dominant material for electronic computing for decades and very likely will stay dominant for the foreseeable future. However, it is well-known that Moore’s law that propelled Silicon into this dominant position is long dead. Therefore, a fervent search for (i) new semiconductors that could directly replace silicon or (ii) new architectures with novel materials/devices added onto silicon or (iii) new physics/state-variables or a combination of above has been the subject of much of the electronic materials and devices research of the past 2 decades. Therefore, there is a pressing need for complementing and supplementing Silicon to operate with greater efficiency, speed and handle greater amounts of data since modern computing has become more data centric with the emergence of artificial intelligence.<br/>The above is however not possible without fundamental innovation in new electronic materials and devices. Therefore, in this talk, I will try to make the case of how novel layered two-dimensional (2D) Indium chalcogenide materials might present interesting avenues to overcome some of the limitations being faced by Silicon hardware. I will start by presenting our ongoing and recent work on integration of 2D In chalcogenide semiconductors with silicon<sup>1, 2</sup> to realize low-power tunnelling field effect transistors. In particular I will focus on In-Se based 2D semiconductors<sup>1</sup> for this application and extend discussion on them to phase-pure, epitaxial thin-film growth over wafer scales,<sup>3</sup> via Metal Organic Chemical Vapor Deposition (MOCVD) at temperatures low-enough to be compatible with back end of line (BEOL) processing in Silicon fabs. In addition, I will show that by careful precursor injection control, one can selective achieve phase-pure growth of InSe vs In<sub>2</sub>Se<sub>3</sub>. Finally, I will present ongoing work on In2Se3 electrical characterization including in and out of plane ferroelectricity. I will end the talk with opportunities to extend applications of InSe and In<sub>2</sub>Se<sub>3</sub> materials and devices.<br/><b>References:</b><br/>1. Miao, J.; Leblanc, C.; Wang, J.; Gu, Y.; Liu, X.; Song, B.; Zhang, H.; Krylyuk, S.; Hu, W.; Davydov, A. V.; Back, T.; Glavin, N.; Jariwala, D., 2D Metal Selenide-Silicon Steep Sub-Threshold Heterojunction Triodes with High On-Current Density. <i>Nature Electronics </i><b>2022,</b> <i>5 </i>(11), 744-751.<br/>2. Miao, J.; Liu, X.; Jo, K.; He, K.; Saxena, R.; Song, B.; Zhang, H.; He, J.; Han, M.-G.; Hu, W.; Jariwala, D., Gate-Tunable Semiconductor Heterojunctions from 2D/3D van der Waals Interfaces. <i>Nano Letters </i><b>2020,</b> <i>20</i> (4), 2907-2915.<br/>3. Song, S.; Jeon, S.; Rahaman, M.; Lynch, J.; Rhee, D.; Kumar, P.; Chakravarthi, S.; Kim, G.; Du, X.; Blanton, E. W., Wafer-scale growth of two-dimensional, phase-pure InSe. <i>Matter </i><b>2023</b>, 6 (10), 3483-3498