Temperature-Dependent Electrical Transport Property Characterization of 2D MoS₂ Channel FETs Grown Using Salt-Based Precursors

2D Transition Metal Dichalcogenides (TMDs) materials have been the focus of recent development for channel materials in scaled sub 10-nm Gate All Around (GAA) Complementary Metal Oxide Semiconductor (CMOS) Field Effect Transistors (FET)[1]. MoS₂ TMDs are one of the major candidates for this application [2]. Salt-assisted growth techniques of MoS₂ have been recently reported which can promote lateral growth at atmospheric pressure and relatively low-temperatures during Chemical Vapor Deposition (CVD) sulfurization process. The initial performance of these MoS₂ FETs has been reported, though much work needs to be done to understand the temperature-dependent response of this material in FET devices. In this work, we report our analysis on salt-based precursor driven CVD grown MoS₂ channel FETs at various temperatures. MoS₂ material was grown using Ammonium Molybdate salt precursor subsequently sulfurized using CVD at 700^oC. After the growth of MoS₂ crystals, they were transferred onto a p-Si substrate with 300nm of SiO₂ on top used as a gate dielectric. The crystals produced by this salt-based precursor driven CVD growth method were approximately 50 microns in length which allowed us to fabricate devices of channel lengths ranging from 0.5μm to 5μm using e-beam lithography. Cr/Au was used as source/drain contacts. When measured at ambient temperature and pressure, the threshold voltage (V_Th), ranged from -35V to -25V depending on the length of the channel. The best case drain current (I_DS ) was 11.5μA, or 1.2μA/μm when normalized by channel width. After establishing the room temperature FET operation, these devices were tested at various temperatures ranging from 200K-400K. Our results show that at lower temperatures (200K-275K), V_Thdecreases slightly and remains constant. As the temperature is increased above room temperature (325K-400K), the value of V_Th grows exponentially until at 400K, the gate loses control on the channel entirely. In addition to temperature influencing the V_Th, the data also shows a strong correlation between temperature and carrier mobility. As temperature increases, the carrier mobility decreases drastically. This trend holds until 400K, at which point the devices cease to display transistor-like characteristics. Interestingly, the gate leakage current was still low at 400K, indicating excessive generation of carriers at 400K that can possibly convert the channel mostly towards semi-metallic. These observations will be benchmarked against observations made on 2D films grown using non-salt-based techniques to understand the role of salt-precursors.<br/>[1] K. P. O’Brien et al., “Process integration and future outlook of 2D transistors,” Nature Communications, vol. 14, no. 1, Oct. 2023, doi: 10.1038/s41467-023-41779-5.<br/>[2] C. Dorow et al., “Advancing Monolayer 2-D nMOS and pMOS Transistor Integration From Growth to Van Der Waals Interface Engineering for Ultimate CMOS Scaling,” I.E.E.E. Transactions on Electron Devices/IEEE Transactions on Electron Devices, vol. 68, no. 12, pp. 6592–6598, Dec. 2021, doi: 10.1109/ted.2021.3118659.<br/>[3] S. K. Mallik et al., “Salt-assisted growth of monolayer MoS2 for high-performance hysteresis-free field-effect transistor,” Journal of Applied Physics, vol. 129, no. 14, Apr. 2021, doi: 10.1063/5.0043884.