Apr 7, 2025
11:15am - 11:30am
Summit, Level 4, Room 439
Jake Rochman1,Haoxiong Yan1,Yue Chen1,Lei Jiang1,Wenhui Wang1,Zihao Yang1,Ruoyu Li1,Leslie Du1,Zhebo Chen1,Mingwei Zhu1,Nag Patibandla1,Robert Visser1
Applied Materials, Inc.1
Jake Rochman1,Haoxiong Yan1,Yue Chen1,Lei Jiang1,Wenhui Wang1,Zihao Yang1,Ruoyu Li1,Leslie Du1,Zhebo Chen1,Mingwei Zhu1,Nag Patibandla1,Robert Visser1
Applied Materials, Inc.1
Superconducting qubits are one of the leading platforms to make a fault-tolerant quantum computer. Substantial developments have been achieved over the recent years, but superconducting qubit hardware is still limited by their qubit error rates and small number of qubits. Improving the material interface losses and defects are critical to lower the error rates for superconducting qubits.
Modern materials engineering on 300 mm wafers has been a leading enabler for the rapid development of classical computing hardware. Superconducting qubit performance can be improved by utilizing the most advanced innovations of the semiconductor industry to reduce variability and enhancing interface quality of the qubits. In this presentation, we will discuss our initial findings in utilizing modern CMOS materials engineering methods to fabricate superconducting qubits with improved interfaces and low error rates.