Apr 9, 2025
5:00pm - 7:00pm
Summit, Level 2, Flex Hall C
Jiwon Kim1,Inkook Hwang1,Hyosil Yang1,Changbun Yoon1
Tech University of Korea1
Jiwon Kim1,Inkook Hwang1,Hyosil Yang1,Changbun Yoon1
Tech University of Korea1
Dynamic Random-Access Memory (DRAM) is a critical component in computer systems. To enhance memory performance, it is crucial to maximize the capacitor capacity within DRAM cells. This objective is achieved by employing High-K dielectric materials and utilizing Atomic Layer Deposition (ALD) techniques to apply these materials in a thin, uniform layer. Controlled thin film deposition that minimizes electronic defects caused by charged vacancies is essential for reducing leakage current and ensuring exceptional dielectric strength. In this study, we fabricated metal–insulator–metal (MIM) capacitors in trench structures with a high aspect ratio using remote plasma ALD (RPALD) and direct plasma ALD (DPALD). The trenches, etched into a silicon substrate, have an aspect ratio of 100:1, a pitch of 38 nm, and a critical dimension (CD) of 76 nm. The electrical characteristics of capacitors consisting of HfO
2 dielectric films, with TiN as the bottom and top electrodes, were investigated. The performance in terms of leakage current density and equivalent oxide thickness was evaluated for MIM structures with HfO
2 thin films processed using the three different ALD methods. XPS and C-V analysis revealed that the RPALD process produced the highest dielectric capacity (~pF) and exhibited superior dielectric breakdown strength (~MV/cm). These results indicate that RPALD results in lower defect density and reduced plasma damage. In contrast, while DP-ALD demonstrates excellent thin film characteristics, it was found that the lateral uniformity is adversely affected during the coating of trench structures due to plasma influence. Given RP-ALD's superior lateral uniformity and excellent film properties, it is anticipated to enhance DRAM performance if it were to replace the currently used thermal ALD process
.This work was supported by K-CHIPS(Korea Collaborative & High-tech Initiative for Prospective Semiconductor Research) (2410000308, RS-2023-00237030, 23027-15FC) funded by the Ministry of Trade, Industry & Energy(MOTIE, Korea).