High-Yield, Low-Loss Nanophotonic Devices with Integrated Spin Defects in SiC-on-Insulator

4H-SiC is a promising material platform for quantum photonic integrated circuits due to its wide bandgap, high refractive index, and variety of optically addressable defects, while being compatible with CMOS fabrication processes. However, it is currently not possible to fabricate chip-scale photonic integrated circuits with integrated color centers due to non-uniformity of SiC thickness arising from the SiC-on-insulator fabrication process. We apply the concept of dopant-selective photoelectrochemical etching to a SiC-on-insulator stack for highly effective total thickness variation (TTV) reduction. We show a reduction of SiC TTV by over a factor of 7 through selectively etching a high-TTV sacrificial n-type layer, to stop on an epitaxially-defined intrinsic layer. We outline strategies to further improve the TTV reduction through structuring of multiple dopant-contrasted layers. Fabricated photonic devices on selectively etched SiCOI exhibit a high yield of optical elements, while maintaining a record low propagation loss for 920 nm single-mode optical elements in SiC (2 dB/cm). Finally, we show etch process compatibility with color centers through measurement of zero phonon line emission from ensemble divacancy defects into our fabricated waveguides. This work represents the first successful demonstration of a TTV reduction method in SiCOI that is compatible with color center emission, marking a significant advancement toward scalable 4H-SiC-on-insulator integrated photonics for quantum technologies.