Fabrication Processes of Next-Gen Integrated Circuits through The Lens of In Situ Transmission Electron Microscopy

Understanding the nanoscale details of chemical and physical processes used in semiconductor manufacturing is critical for scaling and improving the performance of future integrated circuits. Here, I will review the major challenges associated with device scaling and describe how in situ TEM can help in the development of these processes. I will describe how direct imaging of such processes can speed up the implementation of new materials and device architectures to further enable the miniaturization of transistor footprints and improve their performance. Specifically, I will focus on etching and annealing processes used in the fabrication of both transistors and interconnects that link billions of these transistors together and to a power supply.<br/>Our studies highlight the importance of direct nanoscale dynamic visualization of chemical and physical processes for advancing the fabrication processes of integrated circuits.