Towards 300 mm 2D Materials Integration: Focus on Performance, Repeatability and Fab Compatibility

To reach the silicon IC-industry, 2D materials need to pass the strict requirements of the semiconductor foundries and manufacturers. At the current stage of 2D materials research, it is critical for the community to develop work on the wafer-scale integration, yield, and reproducibility instead of selecting the best-performing ‘champion’ device produced on smaller scale. From a growth perspective, layer uniformity and repeatability are critical factors that need to be proven for any materials system considered in the CMOS technology.<br/>Here, we report on the scaling up of 2D materials synthesis to 300 mm substrates. We focus on the different 2D integration schemes, which rely on the growth of 2D materials on amorphous or epitaxial substrates at different temperatures. We then highlight the importance of wafer scale uniformity and run-to-run repeatability for which we try to define for the community the metrology standard of 2D wafer-scale synthesis. Finally, we will address two other key aspects related to cross-contamination and tool cleaning that are being solved to facilitate the entry of these materials into the Si-industry