April 22 - 26, 2024
Seattle, Washington
May 7 - 9, 2024 (Virtual)

Event Supporters

2024 MRS Spring Meeting
EL05.02.01

Heterogeneous and Monolithic 3D Integration of 2D Materials-Based Devices for Future Computing

When and Where

Apr 23, 2024
1:30pm - 2:00pm
Room 344, Level 3, Summit

Presenter(s)

Co-Author(s)

Aaron Thean1,Jinfeng Leong1,Baoshan Tang1,Maheswari Sivan1,Jianan Li1,Evgeny Zamburg1

National University of Singapore1

Abstract

Aaron Thean1,Jinfeng Leong1,Baoshan Tang1,Maheswari Sivan1,Jianan Li1,Evgeny Zamburg1

National University of Singapore1
The inherent limitation of silicon-based complementary metal oxide semiconductors (CMOS) has placed constraints on the continuous performance enhancement of integrated circuits through dimension scaling. Monolithic three-dimensional (M3D) integration, which involves the stacking of devices on top of conventional silicon chips, offers promising avenues for enhancing system performance [1]. Integration of silicon-based CMOS transistors above the metal interconnect layers for massive M3D circuits compromises the devices and interconnect wires due to the high process thermal budget, necessitating exploration for low-thermal budget solutions beyond silicon. This presentation outlines our recent research efforts to explore high throughput, solution-processable 2DM compatible with semiconductor CMOS chip process technology capable of low-thermal budget heterogeneous integration. Specifically, we showed that analog memories formed from a composite stack of liquid-exfoliated MoS2 flakes can attain superior resistive memory switching performance relative to both single-layer 2DM-based and oxide-based devices [3]. These solution-processed MoS2 analog memories can be formed under low-thermal budgets and have been demonstrated on a wafer-level for the realization of M3D in-memory computing. Moreover, these MoS2 nalog memories can also be heterogeneously integrated with photonic neural networks to address the challenges of implementing non-linear activation functions in photonic neurons [4]. To tackle the limitations of materials and device engineering, we will also discuss system architecture-device-materials co-design strategies [4,5] to enhance overall on-chip computational functionality.<br/><b>Reference:</b><br/>[1] A Thean, et al. 2022 IEDM, 12.2.1-12.2.4;<br/>[2] B Tang, et al. Nat. Commun. 2022, 13 (1), 3037;<br/>[3] Z Xu, et al. Light Sci. Appl. 2022, 11 (1), 288<br/>[4] M Sivan, et al. Nat. Commun. 2019, 10(1), 5201;<br/>[5] J F Leong, et al. Advanced Func. Mat. 2023, 2302949

Keywords

2D materials | thin film

Symposium Organizers

Silvija Gradecak, National University of Singapore
Lain-Jong Li, The University of Hong Kong
Iuliana Radu, TSMC Taiwan
John Sudijono, Applied Materials, Inc.

Symposium Support

Gold
Applied Materials

Session Chairs

Hippolyte Astier
Lain-Jong Li

In this Session