Characterization of Structural Transformations in Flash Annealed HZO Thin Films via Dynamic and Static Synchrotron Grazing Incidence X-Ray Scattering

In order to extend computational power beyond the era of conventional area scaling of semiconductor circuits, back-end-of-line (BEOL) integration is a promising pathway towards 3D integration of non-volatile memory with logic, to increase integration density and reduce latency and energy consumption associated with data transfer. With improved properties over perovskite-structure ferroelectrics, HfO₂-ZrO₂(HZO) alloys are promising candidates for future nonvolatile memories because of their CMOS compatibility, sub-nanosecond switching speed, and scalability of ferroelectric properties to the nanoscale. However, synthesis of ferroelectric HZO typically requires rapid high temperature heating to form the ferroelectric phase. Flash lamp annealing (FLA) is a viable method for thermal processing of BEOL components in which sub-ms pulses of light potentially allow localization of steep temperature rises to the top layers of the device stack, and protect underlying interconnect and front-end-of-line (FEOL) structures while crystallizing higher level materials. However, the short time scales and non-equilibrium nature of the annealing technique complicates determining thermal gradients and has led groups to rely on model predictions, measurement of the underside temperature of the substrate, or comparison between the performance of devices processed using rapid thermal anneal (RTA) or FLA to estimate the temperature rise of the surface layers. Because of the strict thermal budget imposed on BEOL processing, it is vital to determine the time-temperature profile associated with non-equilibrium FLA processing.<br/>Our work uses static and time-resolved synchrotron glancing incidence X-ray diffraction (GIXRD) for in-situ, quantitative temperature metrology to understand the temperature rise during FLA processing of TiN/HZO/TiN metal-ferroelectric-metal (MFM) capacitors. Time-resolved GIXRD was performed during FLA processing to observe, in real-time, the emergence of the ferroelectric orthorhombic phase, thermal expansion of the crystal lattice, and changes in diffraction intensity due to the Debye-Waller effect under various annealing conditions. Static GIXRD was subsequently performed to carefully monitor the changes in lattice parameter and diffraction intensity at discrete elevated temperatures. After careful calibration, we were able to compare the changes in both of these parameters and quantitatively determine the temperature rise associated with various FLA conditions.<br/>Using a sequential learning Gaussian Process, we have explored the process manifold to fabricate MFM capacitors with good remnant polarization (P_r ~ 20 µC/cm²) and low coercive fields (E_c ~ 1.2 MV/cm) while being cognizant of the thermal budget necessary to achieve devices of this performance. Thus, careful calibration has enabled exploration of the FLA processing space in effort to yield optimal ferroelectric device performance within the strict thermal budget set by BEOL processing requirements. This study has advanced in-situ temperature metrology to explore temperature transients and FLA processing effects in BEOL device stacks.