Apr 24, 2024
2:15pm - 2:30pm
Room 345, Level 3, Summit
Dawei Wang1,Dinusha Herath Mudiyanselage1,Ziyi He1,Bingcheng Da1,Houqiang Fu1
Arizona State University1
Dawei Wang1,Dinusha Herath Mudiyanselage1,Ziyi He1,Bingcheng Da1,Houqiang Fu1
Arizona State University1
Wide bandgap material GaN is promising in high-efficiency power conversion systems. To realize GaN power integrated circuits (ICs), peripheral logic circuits based on GaN are necessary, such as controllers, drivers, and protection circuits. Using the p-GaN/AlGaN/GaN high electron mobility transistors (HEMTs) platform, all these components can be integrated on a single chip, dramatically reducing parasitic effects, such as gate ringing and false turn-on of power transistors. Recently, Lateral AlGaN/GaN hybrid anode diodes (HADs) have been demonstrated on the commercial p-GaN/AlGaN/GaN platform, attracting significant attention due to the advantages of low on-resistance and low reverse leakage. It has a hybrid Schottky/ohmic anode composed of electrically connected ohmic contact and Schottky gate. The anode voltage can directly cut off the 2DEG channel at reverse bias, thus improving the reverse performance. Etching-free low-damage hydrogen plasma-treated HADs have also been demonstrated for lower turn-on voltage and lower on-resistance. However, the electric field crowding effect at the edge of the anode still exists in the previous reports.<br/><br/>In this work, we perform the design and fabrication of p-GaN/AlGaN/GaN Hybrid Anode Diodes (HADs) with Hydrogen Plasma Guard Line Termination for better electric field management. The high electric field at reverse bias would extend to the whole anode-to-cathode area. The device epilayers were grown by metal-organic chemical vapor deposition (MOCVD) on a sapphire substrate, consisting of a thick GaN buffer layer, a 300 nm UID-GaN layer, a 1 nm AlN space layer, a 20 nm Al0.2Ga0.8N layer and a 90 nm p-GaN layer with an acceptor Mg concentration of 3×10<sup>19</sup> cm<sup>-3</sup>. The substrate was annealed at 800 °C for 30 minutes to break the Mg-H bond and activate the p-GaN layer. The metal stack Ti/Al/Ni/Au was deposited as cathode, followed by post-annealing at 850 °C for 30s. The p-GaN layer under the cathode was etched before metal deposition for better ohmic contact. Then, several hydrogen plasma-treated pattered arrays termination, i.e., guard lines termination, were fabricated to eliminate high electric field crowding at the edge of the anode. The photoresist-based patterns were developed as the mask on the p-GaN layer. The pattern of the guard lines is different from the traditional guard ring termination for vertical GaN devices. The guard line was formed by a series of discontinuous trapezoid-like shapes for partially depleting the 2DEG channel so that the p-GaN would not cut off the 2DEG current along the whole device. The trapezoid shapes were designed for optimized electric field management. In addition, stripe edge termination structures were also introduced at the edge of the anode. Hydrogen plasma treatment was applied to the surface for 5 minutes. The photoresist was then removed using Micro Remover PG at 120 °C. The post-annealing at 400 °C was applied for hydrogen diffusion. Finally, the gate metal Ni was deposited via magnitude sputtering, followed by Au deposition using e-beam deposition. The electrical testing indicated that hydrogen plasma treatment could fully passivate the p-GaN current. The forward current and on-resistance are comparable with the previous reports. The breakdown voltage increased in the devices that have the hydrogen plasma guard line termination structure, and the on-resistance only has a slight increase. The device breakdown voltage was several-kV-class with an anode-to-cathode length (L<sub>AC</sub>) from 25 to 75 um. The device is still under optimization for higher breakdown voltage. These results can provide critical references for the future development of high breakdown voltage lateral p-GaN/AlGaN/GaN devices.