Ultrathin Sb₂Te₃/Ge₄Sb₆Te₇ Superlattices for Low-Power and High-Speed Phase Change Memory

The demand for robust and low-power nonvolatile memory is on the rise due to the rapid growth of big-data, high-performance computing, and data-centric artificial intelligence applications. Phase-change memory (PCM) based on chalcogenides has the potential to bridge the performance gap between existing storage solutions like flash and dynamic random-access memory. Traditional PCM materials suffer from issues such as high switching power and resistance drift over time [1,2]. Superlattices (SLs) made of nanometer-thin phase change materials arranged in alternating layers can overcome some of these challenges by lowering switching current and resistance drift [3,4]. However, the operation speed of these SL-PCM devices has remained slow, ~ hundreds of ns [4].<br/> <br/>Here, we present nanoscale PCM devices (~ 40 nm bottom electrode diameter) based on Sb₂Te₃/GST467 superlattices. Unlike traditional PCM materials, GST467 contains coherent SbTe nanoclusters within the Ge-Sb-Te matrix, enhancing crystallization and lowering the melting temperature. These nanoclusters act as precursors for crystallization, boosting the switching speed of GST467. By incorporating GST467 into our superlattice PCM devices, we achieved remarkable results, including a record-low switching power density of approximately 5 MW/cm², an ultra-low switching voltage of around 0.7 V, sub-1.5 pJ switching energy, rapid switching speed of about 40 ns, low resistance drift with 8 distinct resistance states, and high endurance of ~ 2 × 10⁸ cycles.<br/> <br/>The performance of our devices is attributed to strong heat confinement within the superlattice interfaces and their nanoscale dimensions. Additionally, the unique microstructural properties of GST467, coupled with its higher crystallization temperature, contribute to faster switching speeds and improved stability, surpassing some of the fundamental trade-offs observed in conventional PCM. Importantly, this study combines bottom-up natural interfaces in the nanocomposite with top-down superlattice interfaces in the same memory material, resulting in superior device performance.<br/> <br/>1. H.-S. P. Wong et al., Proc. IEEE 98, 2201–2227 (2010).<br/>2. M. Boniardi et al., IEEE Trans. Electron Devices 57, 2690–2696 (2010).<br/>3. K. Ding et al., Science <b>366</b>, 210 (2019)<br/>4. A.I. Khan, E. Pop et al., IEEE EDL <b>43, </b>204-207 (2022)