Integrated Ultrathin Ferroelectrics in Negative Capacitance Transistors towards Energy-Efficient High-Performance Computing

With the exponentially increasing demand for high-performance computing, the energy efficiency of transistors must continue to improve [1]. In particular, negative capacitance (NC) [2] in ferroelectric materials has emerged as a route to increase the gate capacitance, i.e. lower equivalent oxide thickness (EOT), of a transistor which can reduce the operating voltage and therefore power. However, integration of NC gate oxides in advanced silicon transistors requires ferroelectric stabilization in the ultrathin (sub-2 nm) regime on silicon, which is a significant materials challenge for conventional ferroelectrics. To overcome this, we stabilized ferroelectricity on silicon down to 1 nm [3-4] and 0.5 nm [5] in doped HfO₂ and undoped ZrO₂, respectively, which are the high-κ dielectrics used in today’s advanced logic and memory devices. Notably, these ultrathin ferroelectrics demonstrate signatures of ultrathin-enhanced polarization [3-5], in strong contrast to conventional perovskite oxide-based ferroelectrics.

Next, we leveraged the competing atomic-scale antiferroelectric-ferroelectric orders to design NC in 1.8-nm HfO₂-ZrO₂ superlattices [6-8] and 1-nm ZrO₂ [9], the thicknesses used in today’s advanced transistors and future node transistors, respectively. In contrast to the conventional ferroelectric-dielectric picture for NC stabilization, the microscopic origin of NC in these gate oxides is mixed antiferroelectric-ferroelectric order, which broadens the materials space for NC realization. Furthermore, this work establishes the first demonstrations of capacitance enhancement [6-9] in the technologically-relevant HfO₂-ZrO₂ system, resulting in record-low EOT down to 5 Å [6-9]. Accordingly, when these NC gate oxides were integrated within transistors [6-9], due to the increase in gate capacitance without degradation in carrier velocity and reliability [6-7], record high ON current and transconductance was obtained at 90 nm channel lengths [8-9]. Additionally, there are early indications of industrial adoption as the 1.8-nm HfO₂-ZrO₂ superlattice gate stack has successfully been integrated within a US Defense CMOS R&D Foundry [8] and an advanced FinFET transistor process in an industrial semiconductor foundry [10]. Overall, the materials breakthroughs in this work—ultrathin ferroelectricity and negative capacitance—in the simple CMOS-compatible HfO₂-ZrO₂ material system provides a new route towards energy-efficient computing.

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[4] S Cheema*, N Shanker* et al. “One nanometer HfO2-based ferroelectric tunnel junctions on silicon.” Adv. Electron. Mater. 8, 2100499 (2022).
[5] S Cheema*, N Shanker* et al. “Emergent ferroelectricity in subnanometer binary oxide films on silicon.” Science 376, 648–652 (2022).
[6] S Cheema*, N Shanker* et al., “Ultrathin ferroic HfO₂–ZrO₂ superlattice gate stack for advanced transistors.” Nature 604, 65 (2022).
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[8] N Shanker et al. “CMOS Demonstration of Negative Capacitance HfO₂-ZrO₂ Superlattice Gate Stack in a Self-Aligned, Replacement Gate Process”. in 2022 International Electron Devices Meeting (IEEE, 2022).
[9] N Shanker et al. “Ultralow equivalent oxide thickness via one nanometer ferroelectric negative capacitance.” In preparation
[10] S Jo et al. “Negative differential capacitance in ultrathin ferroelectric hafnia.” Nature Electronics. 6, 390 (2023).