Complementary 2D Tunnel FETs with Extremely Asymmetric Dual-Barrier Heterostructures

Conventional metal oxide semiconductor field-effect transistor (MOSFET) technology currently suffers from the scaling of supply voltage owing to the required power per computed bit of information tightly bound to the subthreshold swing (SS) of 60 mV/dec at room temperature. Tunneling field-effect transistor (TFET) is a promising building block for low-power and steep-slope switching applications in that the lower limit of MOSFET SS, inherently caused by thermionic emission, can be overcome by utilizing band-to-band tunneling. In this presentation, we propose the TFETs using band-offset engineering via 2D van der Waals (vdW) hetero- and multi-junctions. Indeed, 2D materials are ideally suited since they are free from non-ideal tunneling tendencies originating from lattice mismatch as seen in bulk hetero-junctions and their atom-thick body is under the complete electrostatic control. In the fabricated 2D heterostructured TFETs, SnSe₂ and SnSe not only function as the electron and hole reservoirs but provide a highly asymmetric band offset alignment to the intrinsic channel where MoS₂ and WSe₂ are employed for nTFET and pTFET, respectively. The van der Waals coupled TFETs show the promising device characteristics of low-power switching operations in terms of SS and off-current compared to MOSFETs using the same kinds of channels. In addition, complementary 2D TFETs, implemented in both n-type and p-type, expand the breadth of logic configurations. We expect to be able to leverage this naturally biased 2D material platform to implement effective low-power circuits.