April 22 - 26, 2024
Seattle, Washington
May 7 - 9, 2024 (Virtual)

Event Supporters

2024 MRS Spring Meeting
EL04.03.05

Stochastic computing using stochastic memristors from solution-processed hBN

When and Where

May 9, 2024
10:35am - 10:50am
EL04-virtual

Presenter(s)

Co-Author(s)

Lekai Song1,Pengyu Liu1,Jingfang Pei1,Yang Liu1,Songwei Liu1,Yingyi Wen1,Guohua Hu1

Chinese University of Hong Kong1

Abstract

Lekai Song1,Pengyu Liu1,Jingfang Pei1,Yang Liu1,Songwei Liu1,Yingyi Wen1,Guohua Hu1

Chinese University of Hong Kong1
As the device scaling slows down, it is getting challenging for conventional binary computing competent for the rapidly progressing big data and artificial intelligence technologies. Efficient computing paradigms call for material and device innovations. Stochastic computing with probabilistic bits is an emerging computing solution. Here, we demonstrate stochastic logic gates using stochastic volatile filamentary memristors from solution-processed insulating two-dimensional hexagonal boron nitride (hBN), and perform complex logic functions utilizing the stochastic logic gates for stochastic computing.<br/> <br/>We start with hBN ink formulation. Briefly, an ink in isoproposal/2-butanol is prepared by liquid-phase exfoliation of hBN, and is finely tuned in the composition to suit the versatile printing techniques, such as inkjet printing, spin coating, and slot-die. Silver electrodes, patterned by photolithography, are deposited to sandwich the printed hBN to develop Ag/hBN/Ag memristors. Due to the stable insulating property of hBN, the formation and disruption of the silver ion filaments in the hBN switching medium can lead to stochastic yet stable ultrafast switching and memory effect in such a metal/insulator/metal structure. As such, the memristors exhibit stochastic volatile threshold switching with a threshold voltage of ~1 V, an on/off ratio of &gt;10<sup>5</sup>, a switching speed of &lt;300 ns, and an endurance of &gt;10<sup>5 </sup>cycles. The memristors can be switched stochastically with a high speed between the ON (1) and OFF (0) states when applied with ultrafast voltage pulses. We show that the proportion of the ON states from a typical memristor device within a sampling period represents a statistical probability when a pulse train is applied. Notably, the pulse voltage can well modulate the probability, and the voltage-probability relation follows a sigmoid function. This enables the memristors to perform logic computations on the probability. To demonstrate this, the memristors are first connected to comparators as stochastic random number generators, and then connected to standard logic gates as stochastic logic gates for complex, stochastic logic operations for stochastic computing. Specifically, we hardware implement stochastic logic functions of AND, OR, XOR, and MUX gates, and construct a convolutional operator to perform edge detection of images.<br/> <br/>Stochastic computing with probabilistic bits offers a fundamentally different computing paradigm by physically performing the computation with probabilities, potentially leading to substantial reductions in the area, power, and latency in the computing hardware. Besides, the scalable solution-processed approach allows low-cost, high-speed wafer-scale memristor array fabrication. This holds a promising prospect for the development of stochastic computing particularly at the edges with limited computational resources.

Symposium Organizers

Hideki Hirayama, RIKEN
Robert Kaplar, Sandia National Laboratories
Sriram Krishnamoorthy, University of California, Santa Barbara
Matteo Meneghini, University of Padova

Symposium Support

Silver
Taiyo Nippon Sanso

Session Chairs

In this Session