Single-Pulse Control of 'Trans-Memristor' Artificial Synapses

As field-effect transistors (FETs) form the backbone of contemporary digital electronics, artificial synapses form the backbone of various realizations of analog electronics. Inspired by the operation of the brain, these elements determine the degree to which other circuit elements are coupled to each other, the synaptic weight. This weight can be programmed at will or evolved using a training algorithm, typically as a non-volatile response to pulsed input. Among other characteristics, the ideal artificial synapse has an as large as possible number of deterministically programmable states; as low as possible energy costs and delay times for both programming/training and processing; robustness against repeated cycling and stable over time; and scalability to nanoscale dimensions.<br/><br/>Here, we investigate the long-foreseen application of FETs as artificial synapses [1], of which a proof-of-concept was recently demonstrated by various groups [2]. A pulse-controlled switching element – in the simplest realization, a second FET – is used to place charges on the gate electrode of a FET. The channel conductivity responds to the number of charges in a well-defined, analog manner, which allows defining a synaptic weight deterministically. Like digital electronics, both programming and readout can in principle be extremely fast (picosecond timescales) and scaling is straightforward.<br/><br/>We present experimental results on the temporal response of the so-realized 'trans-memristors' to the application of a few voltage pulses, and discuss the dependence of this response on pulse width (~10 – 10⁴ ns), frequency (~1 – 10⁶ Hz), and charging voltage (~ ±2V). We observe that charging obeys simple resistor-capacitor behavior, which allows us to control the associated characteristic time by introducing lump circuit elements such as a series resistor. The FETs under study are micrometer-sized Au-LaAlO₃-SrTiO₃ transistors [3], which have the advantages of a single-crystalline dielectric – boosting endurance – and a low room-temperature mobility of ~1 cm²/Vs – lowering the conductance <i>G</i> to ~1 µS and thus readout power <i>P ~ U²G</i>.<br/><br/>Our experimental results reveal various transient effects, which we identify to be related to characteristic RC times and the FET transit time. Some transients affect the final state of the synapse and must therefore be related to the charging behavior of the gate; other transients do not and must therefore be related to the response of the channel to this charging. These results establish experimental methods to study the dynamics of field-effect artificial synapses – and FETs themselves – in detail, which are key to developing design principles that will reveal the true potential of field-effect artificial synapses as building blocks for neuromorphic hardware.<br/><br/><b>References</b><br/>[1] C.A. Mead, Proceedings of the IEEE <b>78</b>, 1629 (1990)<br/>[2] J. Liu <i>et al.</i> Proceedings IEDM 2021; H. Baba <i>et al.</i>, Proceedings IEDM 2021; S. Park<i> et al.</i>, Adv. Electronic Materials <b>9</b>, 2200554 (2023)<br/>[3] B. Förg <i>et al.</i> Appl. Phys. Lett. <b>100</b>, 053506 (2012); P. D. Eerkes, <i>et al.</i>, Appl. Phys. Lett. <b>103</b>, 201603 (2013)