December 1 - 6, 2024
Boston, Massachusetts
Symposium Supporters
2024 MRS Fall Meeting & Exhibit
EL05.11.25

Reliable Analog AI Inference Acceleration Based on Stable and Accurate Nano-Resistor Array

When and Where

Dec 5, 2024
8:00pm - 10:00pm
Hynes, Level 1, Hall A

Presenter(s)

Co-Author(s)

Giho Lee1,Min-Kyu Song1,Jeehwan Kim1

Massachusetts Institute of Technology1

Abstract

Giho Lee1,Min-Kyu Song1,Jeehwan Kim1

Massachusetts Institute of Technology1
As artificial intelligence (AI) technology continues to excel in daily applications, the demand for seamless, private, and advanced AI functions is growing rapidly. On-device AI solutions, integrated into commercial mobile devices, eliminate the need for communication with external servers, improving both response times and data privacy. However, current on-device AI technologies consume significant power and are not yet capable of supporting the most advanced generative AI models due to limited computing capacity.<br/><br/>Memristor-based analog AI accelerators have shown promise in overcoming the von Neumann bottleneck, a critical barrier to enhancing AI computing speed and energy efficiency. Despite this potential, memristors face challenges related to conductance state reliability and the complexity of their programming algorithms and circuitry, limiting their practical application in industry.<br/><br/>In this work, we present an ultra-reliable nano-resistor array that enables ultra-reliable analog AI inference for well-defined tasks, minimizing the use of additional complex circuitry. The conductance states are fixed and geometrically programmed through a single micro-nano patterning process, eliminating the need for stochastic programming and reducing the complexity of the programming circuits found in memristor-based accelerators. We achieved 6.8-bit programming accuracy and 8-bit stability in conductance values. Furthermore, experimental results from multiply-accumulate (MAC) operations demonstrate the potential for 8.2-bit accuracy in a passive 28x28 array with simple circuit-level compensation. This nano-resistor array will offer a reliable and accurate platform for AI computing, specifically designed for daily AI tasks, while reducing peripheral circuitry.

Symposium Organizers

Paschalis Gkoupidenis, Max Planck Institute
Francesca Santoro, Forschungszentrum Jülich/RWTH Aachen University
Ioulia Tzouvadaki, Ghent University
Yoeri van de Burgt, Technische Universiteit Eindhoven

Session Chairs

Sahika Inal
Ioulia Tzouvadaki

In this Session