Dec 3, 2024
9:30am - 10:00am
Hynes, Level 2, Room 207
Mark Hersam1
Northwestern University1
The exponentially improving performance of digital computers has recently slowed due to the speed and power consumption issues resulting from the von Neumann bottleneck. In contrast, neuromorphic computing aims to circumvent these limitations by spatially co-locating logic and memory in a manner analogous to biological neuronal networks [1]. Beyond reducing power consumption, neuromorphic devices provide efficient architectures for image recognition, machine learning, and artificial intelligence [2]. This talk will explore how 2D nanoelectronic materials enable gate-tunable neuromorphic devices [3]. For example, by utilizing self-aligned, atomically thin heterojunctions, dual-gated Gaussian transistors have been realized, which show tunable anti-ambipolarity for artificial neurons, competitive learning, spiking circuits, and mixed-kernel support vector machines [4,5]. In addition, field-driven defect motion in polycrystalline monolayer MoS<sub>2</sub> enables gate-tunable memristive phenomena that serve as the basis of hybrid memristor/transistor devices (i.e., ‘memtransistors’) that concurrently provide logic and data storage functions [6]. The planar geometry of memtransistors further allows multiple contacts and dual gating that mimic the behavior of biological systems such as heterosynaptic responses [7]. Moreover, control over polycrystalline grain structure enhances the tunability of potentiation and depression, which enables unsupervised continuous learning in spiking neural networks [8]. Finally, the moiré potential in asymmetric twisted bilayer graphene/hexagonal boron nitride heterostructures gives rise to robust electronic ratchet states. The resulting hysteretic, non-volatile injection of charge carriers enables room-temperature operation of moiré synaptic transistors with diverse bio-realistic neuromorphic functionalities and efficient compute-in-memory designs for low-power artificial intelligence and machine learning hardware [9].<br/> <br/>[1] V. K. Sangwan, <i>et al.</i>, <i>Matter</i>, <b>5</b>, 4133 (2022).<br/>[2] V. K. Sangwan,<i> et al.</i>, <i>Nature Nanotechnology, </i><b>15</b>, 517 (2020).<br/>[3] M. E. Beck, <i>et al.</i>, <i>ACS Nano</i>, <b>14</b>, 6498 (2020).<br/>[4] M. E. Beck, <i>et al.</i>, <i>Nature Communications</i>, <b>11</b>, 1565 (2020).<br/>[5] X. Yan, <i>et al.</i>, <i>Nature Electronics</i>, <b>6</b>, 862 (2023).<br/>[6] X. Yan, <i>et al.</i>, <i>Advanced Materials</i>, <b>34</b>, 2108025 (2022).<br/>[7] H.-S. Lee, <i>et al.</i>, <i>Advanced Functional Materials</i>, <b>30</b>, 2003683 (2020).<br/>[8] J. Yuan, <i>et al.</i>, <i>Nano Letters</i>, <b>21</b>, 6432 (2021).<br/>[9] X. Yan, <i>et al.</i>, <i>Nature</i>, <b>624</b>, 551 (2023).