Hybrid Carbon Nanotube and P3HT Ion-Gated Transistors for Neuromorphic Computing

Inspired by the human brain, synaptic devices with low power consumption and high performance have been at the forefront of research. Organic ion-gated transistors have been a promising candidate, owing to their synaptic plasticity and ability to change output signal based on organic film morphology. In ion-gated transistors, synapse is achieved based on the redistribution of ions and extent of ion penetration in the active channel material when a gate voltage is applied. This research focuses on enhancing regioregular poly(3-hexylthiophene) (P3HT) crystallization and directly modifying ion penetration by creating a hybrid structure with carbon nanotubes (CNTs). CNTs have potential to improve mobility of the device and are flexible which enables advanced deposition techniques such as aerosol jet printing.<br/><br/>P3HT film morphology was modified by solvent vehicle, CNT:P3HT concentration, and heat assisted solution crystallization. Preliminary work suggests that the method described below demonstrates evidence of synaptic response. Specifically, P3HT:CNT ion-gated transistors were fabricated by submerging a 300 nm SiO2 prepatterned wafer in 0.01 mg/ml CNT solution for 1 hour followed by submersion in a 0.05 P3HT–chloroform solution for 24 hours. The transistors had channel widths and lengths of 500 microns and 25 microns, respectively. IV sweeps of the devices showed a mobility capacitance of approximately 177 F/cm*V*s when a -0.1 drain voltage was applied and gate swept between -2V and 2V. The recorded height of the polymer films was 7 nm (acquired through AFM measurements). Compared to other methods tested, these samples showed the highest mobility capacitance. Synaptic behavior was verified through pulse measurements where a paired pulse facilitation (PPF) index was found to be as high as 20%, indicating enhancement of the drain current after the second of two repetitive excitatory postsynaptic potentials.<br/><br/>In addition, IV sweep measurements that incorporated pre-biasing of the gate voltage prior to testing were conducted. This entailed applying a gate voltage of -2V for 20 seconds followed by an IV sweep from -2V to 2V. This test was repeated with gate voltages of -1.8V, -1.6V, -1.4V, -1.2V, and -1V. When pre-biasing with a -2V gate voltage the transconductance was 4.24e-4 while the -1V gate voltage resulted in a transconductance of 5.4e-5. This demonstrates an additional parameter that can be tuned to alter the device output, mobility, and synaptic behavior. Next steps include transitioning fabrication methods to be entirely printed via aerosol jet printing, enabling a broad range of applications, specifically in the field of flexible electronics.