Fabrication and Measurement of Nanostructures Using AFM Based Nanolithography

Understanding quantum electronic properties of confined charge carriers in nanostructures can have important implications on the advancement of innovative quantum-based technologies. This is an underexplored area in two-dimensional (2D) material research, primarily due to fabrication challenges. Lithographic patterning and Reactive Ion Etching (RIE) are often used to define these structures. However, etching byproducts, residuals, and edge roughness can create charge localizations and adversely affect electronic performance. In contrast, electrostatic gate defined geometries have been shown to preserve device quality at the cost of increased complexity, imperfect confinement, and imposing the requirement of a tunable bandgap. Presented here is an alternative method of mechanically defining device geometry utilizing AFM based nanolithography and will discuss the methods and techniques used to incorporate the patterned material into van der Waals (vdW) heterostructures. I will also discuss transport measurements of these narrow channels both at zero and high magnetic fields where the interplay between electrostatic and magnetic confinement will be discussed.