Pursuing Epitaxially Grown Single Crystalline Transition Metal Dichalcogenides in Industrial Reactors Inside a Silicon CMOS Fab

Significant progress has been made in the lab, where transistors of monolayer and single crystalline Transition Metal Dichalcogenides (TMDCs) have demonstrated performance that surpasses Silicon under channel thicknesses below 1nm [1]. As per technology roadmaps at A2 logic nodes, transistors' body thickness should be approaching these limits. This has propelled TMDCs as potential materials for integration into future logic nodes in the Armstrong era. Furthermore, TMDCs have also shown great potential for in-memory computing applications that, compared to the current Von Newman architectures, can lead to the more efficient energy consumption required due to the significant increase in computing capacity for artificial intelligence (AI) applications in the coming future [2-3]. Various approaches are being explored to achieve single crystalline TMDCs. Currently, epitaxial growth on sapphire and subsequent transfers have shown the most promising results for synthetic monolayer TMDCs in terms of electrical performance. Notably, significant progress has been achieved in producing single crystalline material on large areas. However, the integration of this approach into a Silicon Fab poses several challenges, including the introduction of sapphire and the use of compatible chemistries to meet contamination and safety requirements.<br/><br/>Therefore, this work focuses on 2 parts: (1) We use metalorganic chemical deposition (MOCVD) based on metal hexacarbonyl with hydrogen disulfide as a method that can be implemented in industrial reactors (200mm and 300mm) using pocket wafers. By carefully tuning the process conditions. We can achieve epitaxial growth of single crystalline monolayer molybdenum disulfide on sapphire[4-5]. (2) We demonstrate the integration of epitaxially grown MoS2 on sapphire into a 300mm CMOS flow [6-7]. We also show the growth of MoS2 and WS2 on 300mm sapphire, showing the scalability potential, paving the way for this method to be integrated into a 300mm silicon fab.<br/><br/>Finally, we share our perspective on the challenges that need attention for synthesizing monolayer TMDCs at 300mm scale on sapphire and integrating them as channel materials into advanced logic nodes.<br/><br/>This work was done in the imec IIAP core CMOS programs and received funding from the European Union's Graphene Flagship grant agreement No 952792, 2D-EPL.<br/><br/>[1] D. Akinwande et al. Nature, 573, 507 (2019)<br/>[2] G. M. Marega et al. Nature volume 587, pages72–77 (2020)<br/>[3] G. M. Marega et al. ACS Nano 16, 3, 3684 (2022)<br/>[4] H. Medina et al. SSDM (2023)<br/>[5] I. Kandybka et al. ACS Nano, 18, 4, 3173–3186 (2024)<br/>[6] S. Ghosh et al. VLSI (2023)<br/>[7] Q. Smets et al., IEDM, 34.2.1-34.2.4 (2021).